src/share/vm/runtime/vm_version.hpp

*** 55,65 ****
    static int          _vm_security_version;
    static int          _vm_patch_version;
    static int          _vm_build_number;
    static unsigned int _parallel_worker_threads;
    static bool         _parallel_worker_threads_initialized;
-   static int          _reserve_for_allocation_prefetch;
  
    static unsigned int nof_parallel_worker_threads(unsigned int num,
                                                    unsigned int dem,
                                                    unsigned int switch_pt);
   public:
--- 55,64 ----
*** 137,152 ****
  
    static unsigned int L1_data_cache_line_size() {
      return _L1_data_cache_line_size;
    }
  
-   // Need a space at the end of TLAB for prefetch instructions
-   // which may fault when accessing memory outside of heap.
-   static int reserve_for_allocation_prefetch() {
-     return _reserve_for_allocation_prefetch;
-   }
- 
    // ARCH specific policy for the BiasedLocking
    static bool use_biased_locking()  { return true; }
  
    // Number of page sizes efficiently supported by the hardware.  Most chips now
    // support two sizes, thus this default implementation.  Processor-specific
--- 136,145 ----