12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_SPARC_VM_VM_VERSION_SPARC_HPP
26 #define CPU_SPARC_VM_VM_VERSION_SPARC_HPP
27
28 #include "runtime/globals_extension.hpp"
29 #include "runtime/vm_version.hpp"
30
31 class VM_Version: public Abstract_VM_Version {
32 protected:
33 enum Feature_Flag {
34 v8_instructions = 0,
35 hardware_mul32 = 1,
36 hardware_div32 = 2,
37 hardware_fsmuld = 3,
38 hardware_popc = 4,
39 v9_instructions = 5,
40 vis1_instructions = 6,
41 vis2_instructions = 7,
42 sun4v_instructions = 8,
43 blk_init_instructions = 9,
44 fmaf_instructions = 10,
45 fmau_instructions = 11,
46 vis3_instructions = 12,
47 cbcond_instructions = 13,
48 sparc64_family = 14,
49 M_family = 15,
50 T_family = 16,
51 T1_model = 17,
|
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_SPARC_VM_VM_VERSION_SPARC_HPP
26 #define CPU_SPARC_VM_VM_VERSION_SPARC_HPP
27
28 #include "runtime/globals_extension.hpp"
29 #include "runtime/vm_version.hpp"
30
31 class VM_Version: public Abstract_VM_Version {
32 friend class VMStructs;
33 protected:
34 enum Feature_Flag {
35 v8_instructions = 0,
36 hardware_mul32 = 1,
37 hardware_div32 = 2,
38 hardware_fsmuld = 3,
39 hardware_popc = 4,
40 v9_instructions = 5,
41 vis1_instructions = 6,
42 vis2_instructions = 7,
43 sun4v_instructions = 8,
44 blk_init_instructions = 9,
45 fmaf_instructions = 10,
46 fmau_instructions = 11,
47 vis3_instructions = 12,
48 cbcond_instructions = 13,
49 sparc64_family = 14,
50 M_family = 15,
51 T_family = 16,
52 T1_model = 17,
|