4359     }
4360   }
4361 }
4362 
4363 void MacroAssembler::vextendbw(bool sign, XMMRegister dst, XMMRegister src) {
4364   if (sign) {
4365     pmovsxbw(dst, src);
4366   } else {
4367     pmovzxbw(dst, src);
4368   }
4369 }
4370 
4371 void MacroAssembler::vextendbw(bool sign, XMMRegister dst, XMMRegister src, int vector_len) {
4372   if (sign) {
4373     vpmovsxbw(dst, src, vector_len);
4374   } else {
4375     vpmovzxbw(dst, src, vector_len);
4376   }
4377 }
4378 














































4379 void MacroAssembler::vshiftd(int opcode, XMMRegister dst, XMMRegister src) {
4380   if (opcode == Op_RShiftVI) {
4381     psrad(dst, src);
4382   } else if (opcode == Op_LShiftVI) {
4383     pslld(dst, src);
4384   } else {
4385     assert((opcode == Op_URShiftVI),"opcode should be Op_URShiftVI");
4386     psrld(dst, src);
4387   }
4388 }
4389 
4390 void MacroAssembler::vshiftd(int opcode, XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
4391   if (opcode == Op_RShiftVI) {
4392     vpsrad(dst, nds, src, vector_len);
4393   } else if (opcode == Op_LShiftVI) {
4394     vpslld(dst, nds, src, vector_len);
4395   } else {
4396     assert((opcode == Op_URShiftVI),"opcode should be Op_URShiftVI");
4397     vpsrld(dst, nds, src, vector_len);
4398   }

4359     }
4360   }
4361 }
4362 
4363 void MacroAssembler::vextendbw(bool sign, XMMRegister dst, XMMRegister src) {
4364   if (sign) {
4365     pmovsxbw(dst, src);
4366   } else {
4367     pmovzxbw(dst, src);
4368   }
4369 }
4370 
4371 void MacroAssembler::vextendbw(bool sign, XMMRegister dst, XMMRegister src, int vector_len) {
4372   if (sign) {
4373     vpmovsxbw(dst, src, vector_len);
4374   } else {
4375     vpmovzxbw(dst, src, vector_len);
4376   }
4377 }
4378 
4379 void MacroAssembler::pminmax(BasicType typ, int opcode, XMMRegister dst, XMMRegister src) {
4380   if (opcode == Op_MinV) {
4381     if (typ == T_BYTE) {
4382         pminsb(dst, src);
4383     } else if (typ == T_SHORT) {
4384         pminsw(dst, src);
4385     } else { 
4386         assert(typ == T_INT,"required.");
4387         pminsd(dst, src);
4388     }
4389   } else { // opcode == Op_MaxV
4390     assert(opcode == Op_MaxV,"required.");
4391     if (typ == T_BYTE) {
4392         pmaxsb(dst, src);
4393     } else if (typ == T_SHORT) {
4394         pmaxsw(dst, src);
4395     } else { 
4396         assert(typ == T_INT,"required.");
4397         pmaxsd(dst, src);
4398     }
4399   }
4400 }
4401 
4402 void MacroAssembler::vpminmax(BasicType typ, int opcode, XMMRegister dst, XMMRegister src1, XMMRegister src2, int vector_len) {
4403   if (opcode == Op_MinV) {
4404     if (typ == T_BYTE) {
4405         vpminsb(dst, src1, src2, vector_len);
4406     } else if (typ == T_SHORT) {
4407         vpminsw(dst, src1, src2, vector_len);
4408     } else { 
4409         assert(typ == T_INT,"required.");
4410         vpminsd(dst, src1, src2, vector_len);
4411     }
4412   } else { // opcode == Op_MaxV
4413     assert(opcode == Op_MaxV,"required.");
4414     if (typ == T_BYTE) {
4415         vpmaxsb(dst, src1, src2, vector_len);
4416     } else if (typ == T_SHORT) {
4417         vpmaxsw(dst, src1, src2, vector_len);
4418     } else { 
4419         assert(typ == T_INT,"required.");
4420         vpmaxsd(dst, src1, src2, vector_len);
4421     }
4422   }
4423 }
4424 
4425 void MacroAssembler::vshiftd(int opcode, XMMRegister dst, XMMRegister src) {
4426   if (opcode == Op_RShiftVI) {
4427     psrad(dst, src);
4428   } else if (opcode == Op_LShiftVI) {
4429     pslld(dst, src);
4430   } else {
4431     assert((opcode == Op_URShiftVI),"opcode should be Op_URShiftVI");
4432     psrld(dst, src);
4433   }
4434 }
4435 
4436 void MacroAssembler::vshiftd(int opcode, XMMRegister dst, XMMRegister nds, XMMRegister src, int vector_len) {
4437   if (opcode == Op_RShiftVI) {
4438     vpsrad(dst, nds, src, vector_len);
4439   } else if (opcode == Op_LShiftVI) {
4440     vpslld(dst, nds, src, vector_len);
4441   } else {
4442     assert((opcode == Op_URShiftVI),"opcode should be Op_URShiftVI");
4443     vpsrld(dst, nds, src, vector_len);
4444   }