32 #include "gc/shared/barrierSet.hpp" 33 #include "gc/shared/cardTable.hpp" 34 #include "gc/shared/barrierSetAssembler.hpp" 35 #include "gc/shared/cardTableBarrierSet.hpp" 36 #include "interpreter/interpreter.hpp" 37 #include "compiler/disassembler.hpp" 38 #include "memory/resourceArea.hpp" 39 #include "nativeInst_aarch64.hpp" 40 #include "oops/compressedOops.inline.hpp" 41 #include "oops/klass.inline.hpp" 42 #include "oops/oop.hpp" 43 #include "opto/compile.hpp" 44 #include "opto/intrinsicnode.hpp" 45 #include "opto/node.hpp" 46 #include "runtime/biasedLocking.hpp" 47 #include "runtime/icache.hpp" 48 #include "runtime/interfaceSupport.inline.hpp" 49 #include "runtime/jniHandles.inline.hpp" 50 #include "runtime/sharedRuntime.hpp" 51 #include "runtime/thread.hpp" 52 #if INCLUDE_ALL_GCS 53 #include "gc/g1/g1BarrierSet.hpp" 54 #include "gc/g1/g1CardTable.hpp" 55 #include "gc/g1/heapRegion.hpp" 56 #endif 57 58 #ifdef PRODUCT 59 #define BLOCK_COMMENT(str) /* nothing */ 60 #define STOP(error) stop(error) 61 #else 62 #define BLOCK_COMMENT(str) block_comment(str) 63 #define STOP(error) block_comment(error); stop(error) 64 #endif 65 66 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":") 67 68 // Patch any kind of instruction; there may be several instructions. 69 // Return the total length (in bytes) of the instructions. 70 int MacroAssembler::pd_patch_instruction_size(address branch, address target) { 71 int instructions = 1; 72 assert((uint64_t)target < (1ul << 48), "48-bit overflow in address constant"); 73 long offset = (target - branch) >> 2; 74 unsigned insn = *(unsigned*)branch; 75 if ((Instruction_aarch64::extract(insn, 29, 24) & 0b111011) == 0b011000) { 76 // Load register (literal) | 32 #include "gc/shared/barrierSet.hpp" 33 #include "gc/shared/cardTable.hpp" 34 #include "gc/shared/barrierSetAssembler.hpp" 35 #include "gc/shared/cardTableBarrierSet.hpp" 36 #include "interpreter/interpreter.hpp" 37 #include "compiler/disassembler.hpp" 38 #include "memory/resourceArea.hpp" 39 #include "nativeInst_aarch64.hpp" 40 #include "oops/compressedOops.inline.hpp" 41 #include "oops/klass.inline.hpp" 42 #include "oops/oop.hpp" 43 #include "opto/compile.hpp" 44 #include "opto/intrinsicnode.hpp" 45 #include "opto/node.hpp" 46 #include "runtime/biasedLocking.hpp" 47 #include "runtime/icache.hpp" 48 #include "runtime/interfaceSupport.inline.hpp" 49 #include "runtime/jniHandles.inline.hpp" 50 #include "runtime/sharedRuntime.hpp" 51 #include "runtime/thread.hpp" 52 53 #ifdef PRODUCT 54 #define BLOCK_COMMENT(str) /* nothing */ 55 #define STOP(error) stop(error) 56 #else 57 #define BLOCK_COMMENT(str) block_comment(str) 58 #define STOP(error) block_comment(error); stop(error) 59 #endif 60 61 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":") 62 63 // Patch any kind of instruction; there may be several instructions. 64 // Return the total length (in bytes) of the instructions. 65 int MacroAssembler::pd_patch_instruction_size(address branch, address target) { 66 int instructions = 1; 67 assert((uint64_t)target < (1ul << 48), "48-bit overflow in address constant"); 68 long offset = (target - branch) >> 2; 69 unsigned insn = *(unsigned*)branch; 70 if ((Instruction_aarch64::extract(insn, 29, 24) & 0b111011) == 0b011000) { 71 // Load register (literal) |