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src/hotspot/cpu/x86/assembler_x86.hpp
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rev 58404 : 8241042: x86_64: Improve Assembler generation
Reviewed-by: vlivanov
@@ -337,19 +337,19 @@
static Address make_array(ArrayAddress);
private:
bool base_needs_rex() const {
- return _base != noreg && _base->encoding() >= 8;
+ return _base->is_valid() && _base->encoding() >= 8;
}
bool index_needs_rex() const {
- return _index != noreg &&_index->encoding() >= 8;
+ return _index->is_valid() &&_index->encoding() >= 8;
}
bool xmmindex_needs_rex() const {
- return _xmmindex != xnoreg && _xmmindex->encoding() >= 8;
+ return _xmmindex->is_valid() && _xmmindex->encoding() >= 8;
}
relocInfo::relocType reloc() const { return _rspec.type(); }
friend class Assembler;
@@ -657,11 +657,11 @@
bool _legacy_mode_bw;
bool _legacy_mode_dq;
bool _legacy_mode_vl;
bool _legacy_mode_vlbw;
- bool _is_managed;
+ NOT_LP64(bool _is_managed;)
class InstructionAttr *_attributes;
// 64bit prefixes
int prefix_and_encode(int reg_enc, bool byteinst = false);
@@ -671,22 +671,29 @@
return prefix_and_encode(dst_enc, false, src_enc, false);
}
int prefix_and_encode(int dst_enc, bool dst_is_byte, int src_enc, bool src_is_byte);
int prefixq_and_encode(int dst_enc, int src_enc);
+
void prefix(Register reg);
void prefix(Register dst, Register src, Prefix p);
void prefix(Register dst, Address adr, Prefix p);
void prefix(Address adr);
void prefixq(Address adr);
+
void prefix(Address adr, Register reg, bool byteinst = false);
void prefix(Address adr, XMMRegister reg);
void prefixq(Address adr, Register reg);
void prefixq(Address adr, XMMRegister reg);
- void prefetch_prefix(Address src);
+ // Some prefix variant have a total mapping - they always exactly one prefix
+ // byte per input), so beside a prefix-emitting method we provide a method
+ // to get the prefix byte to emit. This byte can then be folded into a byte
+ // stream. This can generate faster, more compact code.
+ int8_t get_prefixq(Address adr);
+ int8_t get_prefixq(Address adr, Register reg);
void rex_prefix(Address adr, XMMRegister xreg,
VexSimdPrefix pre, VexOpcode opc, bool rex_w);
int rex_prefix_and_encode(int dst_enc, int src_enc,
VexSimdPrefix pre, VexOpcode opc, bool rex_w);
@@ -868,20 +875,22 @@
void init_attributes(void) {
_legacy_mode_bw = (VM_Version::supports_avx512bw() == false);
_legacy_mode_dq = (VM_Version::supports_avx512dq() == false);
_legacy_mode_vl = (VM_Version::supports_avx512vl() == false);
_legacy_mode_vlbw = (VM_Version::supports_avx512vlbw() == false);
- _is_managed = false;
+ NOT_LP64(_is_managed = false;)
_attributes = NULL;
}
void set_attributes(InstructionAttr *attributes) { _attributes = attributes; }
void clear_attributes(void) { _attributes = NULL; }
- void set_managed(void) { _is_managed = true; }
- void clear_managed(void) { _is_managed = false; }
- bool is_managed(void) { return _is_managed; }
+ void set_managed(void) { NOT_LP64(_is_managed = true;) }
+ void clear_managed(void) { NOT_LP64(_is_managed = false;) }
+ bool is_managed(void) {
+ NOT_LP64(return _is_managed;)
+ LP64_ONLY(return false;) }
void lea(Register dst, Address src);
void mov(Register dst, Register src);
@@ -2278,65 +2287,63 @@
bool rex_vex_w, // Width of data: if 32-bits or less, false, else if 64-bit or specially defined, true
bool legacy_mode, // Details if either this instruction is conditionally encoded to AVX or earlier if true else possibly EVEX
bool no_reg_mask, // when true, k0 is used when EVEX encoding is chosen, else embedded_opmask_register_specifier is used
bool uses_vl) // This instruction may have legacy constraints based on vector length for EVEX
:
- _avx_vector_len(vector_len),
_rex_vex_w(rex_vex_w),
- _rex_vex_w_reverted(false),
- _legacy_mode(legacy_mode),
+ _legacy_mode(legacy_mode || UseAVX < 3),
_no_reg_mask(no_reg_mask),
_uses_vl(uses_vl),
- _tuple_type(Assembler::EVEX_ETUP),
- _input_size_in_bits(Assembler::EVEX_NObit),
+ _rex_vex_w_reverted(false),
_is_evex_instruction(false),
- _evex_encoding(0),
_is_clear_context(true),
_is_extended_context(false),
+ _avx_vector_len(vector_len),
+ _tuple_type(Assembler::EVEX_ETUP),
+ _input_size_in_bits(Assembler::EVEX_NObit),
+ _evex_encoding(0),
_embedded_opmask_register_specifier(0), // hard code k0
- _current_assembler(NULL) {
- if (UseAVX < 3) _legacy_mode = true;
- }
+ _current_assembler(NULL) { }
~InstructionAttr() {
if (_current_assembler != NULL) {
_current_assembler->clear_attributes();
}
_current_assembler = NULL;
}
private:
- int _avx_vector_len;
bool _rex_vex_w;
- bool _rex_vex_w_reverted;
bool _legacy_mode;
bool _no_reg_mask;
bool _uses_vl;
- int _tuple_type;
- int _input_size_in_bits;
+ bool _rex_vex_w_reverted;
bool _is_evex_instruction;
- int _evex_encoding;
bool _is_clear_context;
bool _is_extended_context;
+ int _avx_vector_len;
+ int _tuple_type;
+ int _input_size_in_bits;
+ int _evex_encoding;
int _embedded_opmask_register_specifier;
Assembler *_current_assembler;
public:
// query functions for field accessors
- int get_vector_len(void) const { return _avx_vector_len; }
bool is_rex_vex_w(void) const { return _rex_vex_w; }
- bool is_rex_vex_w_reverted(void) { return _rex_vex_w_reverted; }
bool is_legacy_mode(void) const { return _legacy_mode; }
bool is_no_reg_mask(void) const { return _no_reg_mask; }
bool uses_vl(void) const { return _uses_vl; }
+ bool is_rex_vex_w_reverted(void) { return _rex_vex_w_reverted; }
+ bool is_evex_instruction(void) const { return _is_evex_instruction; }
+ bool is_clear_context(void) const { return _is_clear_context; }
+ bool is_extended_context(void) const { return _is_extended_context; }
+ int get_vector_len(void) const { return _avx_vector_len; }
int get_tuple_type(void) const { return _tuple_type; }
int get_input_size(void) const { return _input_size_in_bits; }
- int is_evex_instruction(void) const { return _is_evex_instruction; }
int get_evex_encoding(void) const { return _evex_encoding; }
- bool is_clear_context(void) const { return _is_clear_context; }
- bool is_extended_context(void) const { return _is_extended_context; }
int get_embedded_opmask_register_specifier(void) const { return _embedded_opmask_register_specifier; }
// Set the vector len manually
void set_vector_len(int vector_len) { _avx_vector_len = vector_len; }
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