300 // from the start of the call to the point where the return address
301 // will point.
302 int MachCallStaticJavaNode::ret_addr_offset() {
303 return 5 + pre_call_resets_size(); // 5 bytes from start of call to where return address points
304 }
305
306 int MachCallDynamicJavaNode::ret_addr_offset() {
307 return 10 + pre_call_resets_size(); // 10 bytes from start of call to where return address points
308 }
309
310 static int sizeof_FFree_Float_Stack_All = -1;
311
312 int MachCallRuntimeNode::ret_addr_offset() {
313 assert(sizeof_FFree_Float_Stack_All != -1, "must have been emitted already");
314 return sizeof_FFree_Float_Stack_All + 5 + pre_call_resets_size();
315 }
316
317 // Indicate if the safepoint node needs the polling page as an input.
318 // Since x86 does have absolute addressing, it doesn't.
319 bool SafePointNode::needs_polling_address_input() {
320 return false;
321 }
322
323 //
324 // Compute padding required for nodes which need alignment
325 //
326
327 // The address of the call instruction needs to be 4-byte aligned to
328 // ensure that it does not span a cache line so that it can be patched.
329 int CallStaticJavaDirectNode::compute_padding(int current_offset) const {
330 current_offset += pre_call_resets_size(); // skip fldcw, if any
331 current_offset += 1; // skip call opcode byte
332 return align_up(current_offset, alignment_required()) - current_offset;
333 }
334
335 // The address of the call instruction needs to be 4-byte aligned to
336 // ensure that it does not span a cache line so that it can be patched.
337 int CallDynamicJavaDirectNode::compute_padding(int current_offset) const {
338 current_offset += pre_call_resets_size(); // skip fldcw, if any
339 current_offset += 5; // skip MOV instruction
340 current_offset += 1; // skip call opcode byte
689
690 // Note that VerifyStackAtCalls' Majik cookie does not change the frame size popped here
691
692 if (framesize >= 128) {
693 emit_opcode(cbuf, 0x81); // add SP, #framesize
694 emit_rm(cbuf, 0x3, 0x00, ESP_enc);
695 emit_d32(cbuf, framesize);
696 } else if (framesize) {
697 emit_opcode(cbuf, 0x83); // add SP, #framesize
698 emit_rm(cbuf, 0x3, 0x00, ESP_enc);
699 emit_d8(cbuf, framesize);
700 }
701
702 emit_opcode(cbuf, 0x58 | EBP_enc);
703
704 if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
705 __ reserved_stack_check();
706 }
707
708 if (do_polling() && C->is_method_compilation()) {
709 cbuf.relocate(cbuf.insts_end(), relocInfo::poll_return_type, 0);
710 emit_opcode(cbuf,0x85);
711 emit_rm(cbuf, 0x0, EAX_enc, 0x5); // EAX
712 emit_d32(cbuf, (intptr_t)os::get_polling_page());
713 }
714 }
715
716 uint MachEpilogNode::size(PhaseRegAlloc *ra_) const {
717 Compile *C = ra_->C;
718 // If method set FPU control word, restore to standard control word
719 int size = C->in_24_bit_fp_mode() ? 6 : 0;
720 if (C->max_vector_size() > 16) size += 3; // vzeroupper
721 if (do_polling() && C->is_method_compilation()) size += 6;
722
723 int framesize = C->frame_size_in_bytes();
724 assert((framesize & (StackAlignmentInBytes-1)) == 0, "frame size not aligned");
725 // Remove two words for return addr and rbp,
726 framesize -= 2*wordSize;
727
728 size++; // popl rbp,
729
730 if (framesize >= 128) {
731 size += 6;
732 } else {
733 size += framesize ? 3 : 0;
734 }
735 size += 64; // added to support ReservedStackAccess
736 return size;
737 }
738
739 int MachEpilogNode::reloc() const {
740 return 0; // a large enough number
741 }
742
743 const Pipeline * MachEpilogNode::pipeline() const {
744 return MachNode::pipeline_class();
745 }
746
747 int MachEpilogNode::safepoint_offset() const { return 0; }
748
749 //=============================================================================
750
751 enum RC { rc_bad, rc_int, rc_float, rc_xmm, rc_stack };
752 static enum RC rc_class( OptoReg::Name reg ) {
753
754 if( !OptoReg::is_valid(reg) ) return rc_bad;
755 if (OptoReg::is_stack(reg)) return rc_stack;
756
13319 %}
13320 ins_pipe(pipe_slow);
13321 %}
13322
13323 instruct cmpFastUnlock(eFlagsReg cr, eRegP object, eAXRegP box, eRegP tmp ) %{
13324 match(Set cr (FastUnlock object box));
13325 effect(TEMP tmp, USE_KILL box);
13326 ins_cost(300);
13327 format %{ "FASTUNLOCK $object,$box\t! kills $box,$tmp" %}
13328 ins_encode %{
13329 __ fast_unlock($object$$Register, $box$$Register, $tmp$$Register, ra_->C->use_rtm());
13330 %}
13331 ins_pipe(pipe_slow);
13332 %}
13333
13334
13335
13336 // ============================================================================
13337 // Safepoint Instruction
13338 instruct safePoint_poll(eFlagsReg cr) %{
13339 match(SafePoint);
13340 effect(KILL cr);
13341
13342 // TODO-FIXME: we currently poll at offset 0 of the safepoint polling page.
13343 // On SPARC that might be acceptable as we can generate the address with
13344 // just a sethi, saving an or. By polling at offset 0 we can end up
13345 // putting additional pressure on the index-0 in the D$. Because of
13346 // alignment (just like the situation at hand) the lower indices tend
13347 // to see more traffic. It'd be better to change the polling address
13348 // to offset 0 of the last $line in the polling page.
13349
13350 format %{ "TSTL #polladdr,EAX\t! Safepoint: poll for GC" %}
13351 ins_cost(125);
13352 size(6) ;
13353 ins_encode( Safepoint_Poll() );
13354 ins_pipe( ialu_reg_mem );
13355 %}
13356
13357
13358 // ============================================================================
13359 // This name is KNOWN by the ADLC and cannot be changed.
13360 // The ADLC forces a 'TypeRawPtr::BOTTOM' output type
13361 // for this guy.
13362 instruct tlsLoadP(eRegP dst, eFlagsReg cr) %{
13363 match(Set dst (ThreadLocal));
13364 effect(DEF dst, KILL cr);
13365
13366 format %{ "MOV $dst, Thread::current()" %}
13367 ins_encode %{
13368 Register dstReg = as_Register($dst$$reg);
13369 __ get_thread(dstReg);
13370 %}
13371 ins_pipe( ialu_reg_fat );
13372 %}
13373
13374
|
300 // from the start of the call to the point where the return address
301 // will point.
302 int MachCallStaticJavaNode::ret_addr_offset() {
303 return 5 + pre_call_resets_size(); // 5 bytes from start of call to where return address points
304 }
305
306 int MachCallDynamicJavaNode::ret_addr_offset() {
307 return 10 + pre_call_resets_size(); // 10 bytes from start of call to where return address points
308 }
309
310 static int sizeof_FFree_Float_Stack_All = -1;
311
312 int MachCallRuntimeNode::ret_addr_offset() {
313 assert(sizeof_FFree_Float_Stack_All != -1, "must have been emitted already");
314 return sizeof_FFree_Float_Stack_All + 5 + pre_call_resets_size();
315 }
316
317 // Indicate if the safepoint node needs the polling page as an input.
318 // Since x86 does have absolute addressing, it doesn't.
319 bool SafePointNode::needs_polling_address_input() {
320 return SafepointMechanism::uses_thread_local_poll();
321 }
322
323 //
324 // Compute padding required for nodes which need alignment
325 //
326
327 // The address of the call instruction needs to be 4-byte aligned to
328 // ensure that it does not span a cache line so that it can be patched.
329 int CallStaticJavaDirectNode::compute_padding(int current_offset) const {
330 current_offset += pre_call_resets_size(); // skip fldcw, if any
331 current_offset += 1; // skip call opcode byte
332 return align_up(current_offset, alignment_required()) - current_offset;
333 }
334
335 // The address of the call instruction needs to be 4-byte aligned to
336 // ensure that it does not span a cache line so that it can be patched.
337 int CallDynamicJavaDirectNode::compute_padding(int current_offset) const {
338 current_offset += pre_call_resets_size(); // skip fldcw, if any
339 current_offset += 5; // skip MOV instruction
340 current_offset += 1; // skip call opcode byte
689
690 // Note that VerifyStackAtCalls' Majik cookie does not change the frame size popped here
691
692 if (framesize >= 128) {
693 emit_opcode(cbuf, 0x81); // add SP, #framesize
694 emit_rm(cbuf, 0x3, 0x00, ESP_enc);
695 emit_d32(cbuf, framesize);
696 } else if (framesize) {
697 emit_opcode(cbuf, 0x83); // add SP, #framesize
698 emit_rm(cbuf, 0x3, 0x00, ESP_enc);
699 emit_d8(cbuf, framesize);
700 }
701
702 emit_opcode(cbuf, 0x58 | EBP_enc);
703
704 if (StackReservedPages > 0 && C->has_reserved_stack_access()) {
705 __ reserved_stack_check();
706 }
707
708 if (do_polling() && C->is_method_compilation()) {
709 if (SafepointMechanism::uses_thread_local_poll()) {
710 Register pollReg = as_Register(EBX_enc);
711 MacroAssembler masm(&cbuf);
712 masm.get_thread(pollReg);
713 masm.movl(pollReg, Address(pollReg, in_bytes(Thread::polling_page_offset())));
714 masm.relocate(relocInfo::poll_return_type);
715 masm.testl(rax, Address(pollReg, 0));
716 } else {
717 cbuf.relocate(cbuf.insts_end(), relocInfo::poll_return_type, 0);
718 emit_opcode(cbuf,0x85);
719 emit_rm(cbuf, 0x0, EAX_enc, 0x5); // EAX
720 emit_d32(cbuf, (intptr_t)os::get_polling_page());
721 }
722 }
723 }
724
725 uint MachEpilogNode::size(PhaseRegAlloc *ra_) const {
726 return MachNode::size(ra_); // too many variables; just compute it
727 // the hard way
728 }
729
730 int MachEpilogNode::reloc() const {
731 return 0; // a large enough number
732 }
733
734 const Pipeline * MachEpilogNode::pipeline() const {
735 return MachNode::pipeline_class();
736 }
737
738 int MachEpilogNode::safepoint_offset() const { return 0; }
739
740 //=============================================================================
741
742 enum RC { rc_bad, rc_int, rc_float, rc_xmm, rc_stack };
743 static enum RC rc_class( OptoReg::Name reg ) {
744
745 if( !OptoReg::is_valid(reg) ) return rc_bad;
746 if (OptoReg::is_stack(reg)) return rc_stack;
747
13310 %}
13311 ins_pipe(pipe_slow);
13312 %}
13313
13314 instruct cmpFastUnlock(eFlagsReg cr, eRegP object, eAXRegP box, eRegP tmp ) %{
13315 match(Set cr (FastUnlock object box));
13316 effect(TEMP tmp, USE_KILL box);
13317 ins_cost(300);
13318 format %{ "FASTUNLOCK $object,$box\t! kills $box,$tmp" %}
13319 ins_encode %{
13320 __ fast_unlock($object$$Register, $box$$Register, $tmp$$Register, ra_->C->use_rtm());
13321 %}
13322 ins_pipe(pipe_slow);
13323 %}
13324
13325
13326
13327 // ============================================================================
13328 // Safepoint Instruction
13329 instruct safePoint_poll(eFlagsReg cr) %{
13330 predicate(SafepointMechanism::uses_global_page_poll());
13331 match(SafePoint);
13332 effect(KILL cr);
13333
13334 // TODO-FIXME: we currently poll at offset 0 of the safepoint polling page.
13335 // On SPARC that might be acceptable as we can generate the address with
13336 // just a sethi, saving an or. By polling at offset 0 we can end up
13337 // putting additional pressure on the index-0 in the D$. Because of
13338 // alignment (just like the situation at hand) the lower indices tend
13339 // to see more traffic. It'd be better to change the polling address
13340 // to offset 0 of the last $line in the polling page.
13341
13342 format %{ "TSTL #polladdr,EAX\t! Safepoint: poll for GC" %}
13343 ins_cost(125);
13344 size(6) ;
13345 ins_encode( Safepoint_Poll() );
13346 ins_pipe( ialu_reg_mem );
13347 %}
13348
13349 instruct safePoint_poll_tls(eFlagsReg cr, eRegP_no_EBP poll) %{
13350 predicate(SafepointMechanism::uses_thread_local_poll());
13351 match(SafePoint poll);
13352 effect(KILL cr, USE poll);
13353
13354 format %{ "TSTL #EAX,[$poll]\t! Safepoint: poll for GC" %}
13355 ins_cost(125);
13356 // EBP would need size(3)
13357 size(2); /* setting an explicit size will cause debug builds to assert if size is incorrect */
13358 ins_encode %{
13359 __ relocate(relocInfo::poll_type);
13360 address pre_pc = __ pc();
13361 __ testl(rax, Address($poll$$Register, 0));
13362 address post_pc = __ pc();
13363 guarantee(pre_pc[0] == 0x85, "must emit test-ax [reg]");
13364 %}
13365 ins_pipe(ialu_reg_mem);
13366 %}
13367
13368
13369 // ============================================================================
13370 // This name is KNOWN by the ADLC and cannot be changed.
13371 // The ADLC forces a 'TypeRawPtr::BOTTOM' output type
13372 // for this guy.
13373 instruct tlsLoadP(eRegP dst, eFlagsReg cr) %{
13374 match(Set dst (ThreadLocal));
13375 effect(DEF dst, KILL cr);
13376
13377 format %{ "MOV $dst, Thread::current()" %}
13378 ins_encode %{
13379 Register dstReg = as_Register($dst$$reg);
13380 __ get_thread(dstReg);
13381 %}
13382 ins_pipe( ialu_reg_fat );
13383 %}
13384
13385
|