1 /*
2 * Copyright (c) 2005, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_LIRGenerator.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciArray.hpp"
34 #include "ci/ciObjArrayKlass.hpp"
35 #include "ci/ciTypeArrayKlass.hpp"
36 #include "runtime/sharedRuntime.hpp"
37 #include "runtime/stubRoutines.hpp"
38 #include "vmreg_x86.inline.hpp"
39
40 #ifdef ASSERT
41 #define __ gen()->lir(__FILE__, __LINE__)->
42 #else
43 #define __ gen()->lir()->
44 #endif
45
46 // Item will be loaded into a byte register; Intel only
47 void LIRItem::load_byte_item() {
48 load_item();
49 LIR_Opr res = result();
50
51 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
52 // make sure that it is a byte register
53 assert(!value()->type()->is_float() && !value()->type()->is_double(),
54 "can't load floats in byte register");
55 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
56 __ move(res, reg);
57
58 _result = reg;
59 }
60 }
61
62
63 void LIRItem::load_nonconstant() {
64 LIR_Opr r = value()->operand();
65 if (r->is_constant()) {
66 _result = r;
67 } else {
68 load_item();
69 }
70 }
71
72 //--------------------------------------------------------------
73 // LIRGenerator
74 //--------------------------------------------------------------
75
76
77 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
78 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
79 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
80 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
81 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
82 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
83 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
84 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
85 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
86
87
88 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
89 LIR_Opr opr;
90 switch (type->tag()) {
91 case intTag: opr = FrameMap::rax_opr; break;
92 case objectTag: opr = FrameMap::rax_oop_opr; break;
93 case longTag: opr = FrameMap::long0_opr; break;
94 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
95 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
96
97 case addressTag:
98 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
99 }
100
101 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
102 return opr;
103 }
104
105
106 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
107 LIR_Opr reg = new_register(T_INT);
108 set_vreg_flag(reg, LIRGenerator::byte_reg);
109 return reg;
110 }
111
112
113 //--------- loading items into registers --------------------------------
114
115
116 // i486 instructions can inline constants
117 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
118 if (type == T_SHORT || type == T_CHAR) {
119 // there is no immediate move of word values in asembler_i486.?pp
120 return false;
121 }
122 Constant* c = v->as_Constant();
123 if (c && c->state_before() == NULL) {
124 // constants of any type can be stored directly, except for
125 // unloaded object constants.
126 return true;
127 }
128 return false;
129 }
130
131
132 bool LIRGenerator::can_inline_as_constant(Value v) const {
133 if (v->type()->tag() == longTag) return false;
134 return v->type()->tag() != objectTag ||
135 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
136 }
137
138
139 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
140 if (c->type() == T_LONG) return false;
141 return c->type() != T_OBJECT || c->as_jobject() == NULL;
142 }
143
144
145 LIR_Opr LIRGenerator::safepoint_poll_register() {
146 NOT_AMD64( if (SafepointMechanism::uses_thread_local_poll()) { return new_register(T_ADDRESS); } )
147 return LIR_OprFact::illegalOpr;
148 }
149
150
151 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
152 int shift, int disp, BasicType type) {
153 assert(base->is_register(), "must be");
154 if (index->is_constant()) {
155 return new LIR_Address(base,
156 ((intx)(index->as_constant_ptr()->as_jint()) << shift) + disp,
157 type);
158 } else {
159 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
160 }
161 }
162
163
164 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
165 BasicType type, bool needs_card_mark) {
166 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
167
168 LIR_Address* addr;
169 if (index_opr->is_constant()) {
170 int elem_size = type2aelembytes(type);
171 addr = new LIR_Address(array_opr,
172 offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
173 } else {
174 #ifdef _LP64
175 if (index_opr->type() == T_INT) {
176 LIR_Opr tmp = new_register(T_LONG);
177 __ convert(Bytecodes::_i2l, index_opr, tmp);
178 index_opr = tmp;
179 }
180 #endif // _LP64
181 addr = new LIR_Address(array_opr,
182 index_opr,
183 LIR_Address::scale(type),
184 offset_in_bytes, type);
185 }
186 if (needs_card_mark) {
187 // This store will need a precise card mark, so go ahead and
188 // compute the full adddres instead of computing once for the
189 // store and again for the card mark.
190 LIR_Opr tmp = new_pointer_register();
191 __ leal(LIR_OprFact::address(addr), tmp);
192 return new LIR_Address(tmp, type);
193 } else {
194 return addr;
195 }
196 }
197
198
199 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
200 LIR_Opr r = NULL;
201 if (type == T_LONG) {
202 r = LIR_OprFact::longConst(x);
203 } else if (type == T_INT) {
204 r = LIR_OprFact::intConst(x);
205 } else {
206 ShouldNotReachHere();
207 }
208 return r;
209 }
210
211 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
212 LIR_Opr pointer = new_pointer_register();
213 __ move(LIR_OprFact::intptrConst(counter), pointer);
214 LIR_Address* addr = new LIR_Address(pointer, type);
215 increment_counter(addr, step);
216 }
217
218
219 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
220 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
221 }
222
223 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
224 __ cmp_mem_int(condition, base, disp, c, info);
225 }
226
227
228 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
229 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
230 }
231
232
233 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
234 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
235 }
236
237
238 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
239 if (tmp->is_valid() && c > 0 && c < max_jint) {
240 if (is_power_of_2(c + 1)) {
241 __ move(left, tmp);
242 __ shift_left(left, log2_intptr(c + 1), left);
243 __ sub(left, tmp, result);
244 return true;
245 } else if (is_power_of_2(c - 1)) {
246 __ move(left, tmp);
247 __ shift_left(left, log2_intptr(c - 1), left);
248 __ add(left, tmp, result);
249 return true;
250 }
251 }
252 return false;
253 }
254
255
256 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
257 BasicType type = item->type();
258 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
259 }
260
261 //----------------------------------------------------------------------
262 // visitor functions
263 //----------------------------------------------------------------------
264
265
266 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
267 assert(x->is_pinned(),"");
268 bool needs_range_check = x->compute_needs_range_check();
269 bool use_length = x->length() != NULL;
270 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
271 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
272 !get_jobject_constant(x->value())->is_null_object() ||
273 x->should_profile());
274
275 LIRItem array(x->array(), this);
276 LIRItem index(x->index(), this);
277 LIRItem value(x->value(), this);
278 LIRItem length(this);
279
280 array.load_item();
281 index.load_nonconstant();
282
283 if (use_length && needs_range_check) {
284 length.set_instruction(x->length());
285 length.load_item();
286
287 }
288 if (needs_store_check || x->check_boolean()) {
289 value.load_item();
290 } else {
291 value.load_for_store(x->elt_type());
292 }
293
294 set_no_result(x);
295
296 // the CodeEmitInfo must be duplicated for each different
297 // LIR-instruction because spilling can occur anywhere between two
298 // instructions and so the debug information must be different
299 CodeEmitInfo* range_check_info = state_for(x);
300 CodeEmitInfo* null_check_info = NULL;
301 if (x->needs_null_check()) {
302 null_check_info = new CodeEmitInfo(range_check_info);
303 }
304
305 // emit array address setup early so it schedules better
306 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
307
308 if (GenerateRangeChecks && needs_range_check) {
309 if (use_length) {
310 __ cmp(lir_cond_belowEqual, length.result(), index.result());
311 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
312 } else {
313 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
314 // range_check also does the null check
315 null_check_info = NULL;
316 }
317 }
318
319 if (GenerateArrayStoreCheck && needs_store_check) {
320 LIR_Opr tmp1 = new_register(objectType);
321 LIR_Opr tmp2 = new_register(objectType);
322 LIR_Opr tmp3 = new_register(objectType);
323
324 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
325 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
326 }
327
328 if (obj_store) {
329 // Needs GC write barriers.
330 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
331 true /* do_load */, false /* patch */, NULL);
332 __ move(value.result(), array_addr, null_check_info);
333 // Seems to be a precise
334 post_barrier(LIR_OprFact::address(array_addr), value.result());
335 } else {
336 LIR_Opr result = maybe_mask_boolean(x, array.result(), value.result(), null_check_info);
337 __ move(result, array_addr, null_check_info);
338 }
339 }
340
341
342 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
343 assert(x->is_pinned(),"");
344 LIRItem obj(x->obj(), this);
345 obj.load_item();
346
347 set_no_result(x);
348
349 // "lock" stores the address of the monitor stack slot, so this is not an oop
350 LIR_Opr lock = new_register(T_INT);
351 // Need a scratch register for biased locking on x86
352 LIR_Opr scratch = LIR_OprFact::illegalOpr;
353 if (UseBiasedLocking) {
354 scratch = new_register(T_INT);
355 }
356
357 CodeEmitInfo* info_for_exception = NULL;
358 if (x->needs_null_check()) {
359 info_for_exception = state_for(x);
360 }
361 // this CodeEmitInfo must not have the xhandlers because here the
362 // object is already locked (xhandlers expect object to be unlocked)
363 CodeEmitInfo* info = state_for(x, x->state(), true);
364 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
365 x->monitor_no(), info_for_exception, info);
366 }
367
368
369 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
370 assert(x->is_pinned(),"");
371
372 LIRItem obj(x->obj(), this);
373 obj.dont_load_item();
374
375 LIR_Opr lock = new_register(T_INT);
376 LIR_Opr obj_temp = new_register(T_INT);
377 set_no_result(x);
378 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
379 }
380
381
382 // _ineg, _lneg, _fneg, _dneg
383 void LIRGenerator::do_NegateOp(NegateOp* x) {
384 LIRItem value(x->x(), this);
385 value.set_destroys_register();
386 value.load_item();
387 LIR_Opr reg = rlock(x);
388 __ negate(value.result(), reg);
389
390 set_result(x, round_item(reg));
391 }
392
393
394 // for _fadd, _fmul, _fsub, _fdiv, _frem
395 // _dadd, _dmul, _dsub, _ddiv, _drem
396 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
397 LIRItem left(x->x(), this);
398 LIRItem right(x->y(), this);
399 LIRItem* left_arg = &left;
400 LIRItem* right_arg = &right;
401 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
402 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
403 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
404 left.load_item();
405 } else {
406 left.dont_load_item();
407 }
408
409 // do not load right operand if it is a constant. only 0 and 1 are
410 // loaded because there are special instructions for loading them
411 // without memory access (not needed for SSE2 instructions)
412 bool must_load_right = false;
413 if (right.is_constant()) {
414 LIR_Const* c = right.result()->as_constant_ptr();
415 assert(c != NULL, "invalid constant");
416 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
417
418 if (c->type() == T_FLOAT) {
419 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
420 } else {
421 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
422 }
423 }
424
425 if (must_load_both) {
426 // frem and drem destroy also right operand, so move it to a new register
427 right.set_destroys_register();
428 right.load_item();
429 } else if (right.is_register() || must_load_right) {
430 right.load_item();
431 } else {
432 right.dont_load_item();
433 }
434 LIR_Opr reg = rlock(x);
435 LIR_Opr tmp = LIR_OprFact::illegalOpr;
436 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
437 tmp = new_register(T_DOUBLE);
438 }
439
440 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
441 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
442 LIR_Opr fpu0, fpu1;
443 if (x->op() == Bytecodes::_frem) {
444 fpu0 = LIR_OprFact::single_fpu(0);
445 fpu1 = LIR_OprFact::single_fpu(1);
446 } else {
447 fpu0 = LIR_OprFact::double_fpu(0);
448 fpu1 = LIR_OprFact::double_fpu(1);
449 }
450 __ move(right.result(), fpu1); // order of left and right operand is important!
451 __ move(left.result(), fpu0);
452 __ rem (fpu0, fpu1, fpu0);
453 __ move(fpu0, reg);
454
455 } else {
456 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
457 }
458
459 set_result(x, round_item(reg));
460 }
461
462
463 // for _ladd, _lmul, _lsub, _ldiv, _lrem
464 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
465 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
466 // long division is implemented as a direct call into the runtime
467 LIRItem left(x->x(), this);
468 LIRItem right(x->y(), this);
469
470 // the check for division by zero destroys the right operand
471 right.set_destroys_register();
472
473 BasicTypeList signature(2);
474 signature.append(T_LONG);
475 signature.append(T_LONG);
476 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
477
478 // check for division by zero (destroys registers of right operand!)
479 CodeEmitInfo* info = state_for(x);
480
481 const LIR_Opr result_reg = result_register_for(x->type());
482 left.load_item_force(cc->at(1));
483 right.load_item();
484
485 __ move(right.result(), cc->at(0));
486
487 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
488 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
489
490 address entry = NULL;
491 switch (x->op()) {
492 case Bytecodes::_lrem:
493 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
494 break; // check if dividend is 0 is done elsewhere
495 case Bytecodes::_ldiv:
496 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
497 break; // check if dividend is 0 is done elsewhere
498 case Bytecodes::_lmul:
499 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
500 break;
501 default:
502 ShouldNotReachHere();
503 }
504
505 LIR_Opr result = rlock_result(x);
506 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
507 __ move(result_reg, result);
508 } else if (x->op() == Bytecodes::_lmul) {
509 // missing test if instr is commutative and if we should swap
510 LIRItem left(x->x(), this);
511 LIRItem right(x->y(), this);
512
513 // right register is destroyed by the long mul, so it must be
514 // copied to a new register.
515 right.set_destroys_register();
516
517 left.load_item();
518 right.load_item();
519
520 LIR_Opr reg = FrameMap::long0_opr;
521 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
522 LIR_Opr result = rlock_result(x);
523 __ move(reg, result);
524 } else {
525 // missing test if instr is commutative and if we should swap
526 LIRItem left(x->x(), this);
527 LIRItem right(x->y(), this);
528
529 left.load_item();
530 // don't load constants to save register
531 right.load_nonconstant();
532 rlock_result(x);
533 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
534 }
535 }
536
537
538
539 // for: _iadd, _imul, _isub, _idiv, _irem
540 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
541 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
542 // The requirements for division and modulo
543 // input : rax,: dividend min_int
544 // reg: divisor (may not be rax,/rdx) -1
545 //
546 // output: rax,: quotient (= rax, idiv reg) min_int
547 // rdx: remainder (= rax, irem reg) 0
548
549 // rax, and rdx will be destroyed
550
551 // Note: does this invalidate the spec ???
552 LIRItem right(x->y(), this);
553 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
554
555 // call state_for before load_item_force because state_for may
556 // force the evaluation of other instructions that are needed for
557 // correct debug info. Otherwise the live range of the fix
558 // register might be too long.
559 CodeEmitInfo* info = state_for(x);
560
561 left.load_item_force(divInOpr());
562
563 right.load_item();
564
565 LIR_Opr result = rlock_result(x);
566 LIR_Opr result_reg;
567 if (x->op() == Bytecodes::_idiv) {
568 result_reg = divOutOpr();
569 } else {
570 result_reg = remOutOpr();
571 }
572
573 if (!ImplicitDiv0Checks) {
574 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
575 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
576 }
577 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
578 if (x->op() == Bytecodes::_irem) {
579 __ irem(left.result(), right.result(), result_reg, tmp, info);
580 } else if (x->op() == Bytecodes::_idiv) {
581 __ idiv(left.result(), right.result(), result_reg, tmp, info);
582 } else {
583 ShouldNotReachHere();
584 }
585
586 __ move(result_reg, result);
587 } else {
588 // missing test if instr is commutative and if we should swap
589 LIRItem left(x->x(), this);
590 LIRItem right(x->y(), this);
591 LIRItem* left_arg = &left;
592 LIRItem* right_arg = &right;
593 if (x->is_commutative() && left.is_stack() && right.is_register()) {
594 // swap them if left is real stack (or cached) and right is real register(not cached)
595 left_arg = &right;
596 right_arg = &left;
597 }
598
599 left_arg->load_item();
600
601 // do not need to load right, as we can handle stack and constants
602 if (x->op() == Bytecodes::_imul ) {
603 // check if we can use shift instead
604 bool use_constant = false;
605 bool use_tmp = false;
606 if (right_arg->is_constant()) {
607 jint iconst = right_arg->get_jint_constant();
608 if (iconst > 0 && iconst < max_jint) {
609 if (is_power_of_2(iconst)) {
610 use_constant = true;
611 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
612 use_constant = true;
613 use_tmp = true;
614 }
615 }
616 }
617 if (use_constant) {
618 right_arg->dont_load_item();
619 } else {
620 right_arg->load_item();
621 }
622 LIR_Opr tmp = LIR_OprFact::illegalOpr;
623 if (use_tmp) {
624 tmp = new_register(T_INT);
625 }
626 rlock_result(x);
627
628 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
629 } else {
630 right_arg->dont_load_item();
631 rlock_result(x);
632 LIR_Opr tmp = LIR_OprFact::illegalOpr;
633 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
634 }
635 }
636 }
637
638
639 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
640 // when an operand with use count 1 is the left operand, then it is
641 // likely that no move for 2-operand-LIR-form is necessary
642 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
643 x->swap_operands();
644 }
645
646 ValueTag tag = x->type()->tag();
647 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
648 switch (tag) {
649 case floatTag:
650 case doubleTag: do_ArithmeticOp_FPU(x); return;
651 case longTag: do_ArithmeticOp_Long(x); return;
652 case intTag: do_ArithmeticOp_Int(x); return;
653 default: ShouldNotReachHere(); return;
654 }
655 }
656
657
658 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
659 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
660 // count must always be in rcx
661 LIRItem value(x->x(), this);
662 LIRItem count(x->y(), this);
663
664 ValueTag elemType = x->type()->tag();
665 bool must_load_count = !count.is_constant() || elemType == longTag;
666 if (must_load_count) {
667 // count for long must be in register
668 count.load_item_force(shiftCountOpr());
669 } else {
670 count.dont_load_item();
671 }
672 value.load_item();
673 LIR_Opr reg = rlock_result(x);
674
675 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
676 }
677
678
679 // _iand, _land, _ior, _lor, _ixor, _lxor
680 void LIRGenerator::do_LogicOp(LogicOp* x) {
681 // when an operand with use count 1 is the left operand, then it is
682 // likely that no move for 2-operand-LIR-form is necessary
683 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
684 x->swap_operands();
685 }
686
687 LIRItem left(x->x(), this);
688 LIRItem right(x->y(), this);
689
690 left.load_item();
691 right.load_nonconstant();
692 LIR_Opr reg = rlock_result(x);
693
694 logic_op(x->op(), reg, left.result(), right.result());
695 }
696
697
698
699 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
700 void LIRGenerator::do_CompareOp(CompareOp* x) {
701 LIRItem left(x->x(), this);
702 LIRItem right(x->y(), this);
703 ValueTag tag = x->x()->type()->tag();
704 if (tag == longTag) {
705 left.set_destroys_register();
706 }
707 left.load_item();
708 right.load_item();
709 LIR_Opr reg = rlock_result(x);
710
711 if (x->x()->type()->is_float_kind()) {
712 Bytecodes::Code code = x->op();
713 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
714 } else if (x->x()->type()->tag() == longTag) {
715 __ lcmp2int(left.result(), right.result(), reg);
716 } else {
717 Unimplemented();
718 }
719 }
720
721
722 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
723 assert(x->number_of_arguments() == 4, "wrong type");
724 LIRItem obj (x->argument_at(0), this); // object
725 LIRItem offset(x->argument_at(1), this); // offset of field
726 LIRItem cmp (x->argument_at(2), this); // value to compare with field
727 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
728
729 assert(obj.type()->tag() == objectTag, "invalid type");
730
731 // In 64bit the type can be long, sparc doesn't have this assert
732 // assert(offset.type()->tag() == intTag, "invalid type");
733
734 assert(cmp.type()->tag() == type->tag(), "invalid type");
735 assert(val.type()->tag() == type->tag(), "invalid type");
736
737 // get address of field
738 obj.load_item();
739 offset.load_nonconstant();
740
741 LIR_Opr addr = new_pointer_register();
742 LIR_Address* a;
743 if(offset.result()->is_constant()) {
744 #ifdef _LP64
745 jlong c = offset.result()->as_jlong();
746 if ((jlong)((jint)c) == c) {
747 a = new LIR_Address(obj.result(),
748 (jint)c,
749 as_BasicType(type));
750 } else {
751 LIR_Opr tmp = new_register(T_LONG);
752 __ move(offset.result(), tmp);
753 a = new LIR_Address(obj.result(),
754 tmp,
755 as_BasicType(type));
756 }
757 #else
758 a = new LIR_Address(obj.result(),
759 offset.result()->as_jint(),
760 as_BasicType(type));
761 #endif
762 } else {
763 a = new LIR_Address(obj.result(),
764 offset.result(),
765 0,
766 as_BasicType(type));
767 }
768 __ leal(LIR_OprFact::address(a), addr);
769
770 if (type == objectType) { // Write-barrier needed for Object fields.
771 // Do the pre-write barrier, if any.
772 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
773 true /* do_load */, false /* patch */, NULL);
774 }
775
776 if (type == objectType) {
777 cmp.load_item_force(FrameMap::rax_oop_opr);
778 val.load_item();
779 } else if (type == intType) {
780 cmp.load_item_force(FrameMap::rax_opr);
781 val.load_item();
782 } else if (type == longType) {
783 cmp.load_item_force(FrameMap::long0_opr);
784 val.load_item_force(FrameMap::long1_opr);
785 } else {
786 ShouldNotReachHere();
787 }
788
789 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
790 if (type == objectType)
791 __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
792 else if (type == intType)
793 __ cas_int(addr, cmp.result(), val.result(), ill, ill);
794 else if (type == longType)
795 __ cas_long(addr, cmp.result(), val.result(), ill, ill);
796 else {
797 ShouldNotReachHere();
798 }
799
800 // generate conditional move of boolean result
801 LIR_Opr result = rlock_result(x);
802 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
803 result, as_BasicType(type));
804 if (type == objectType) { // Write-barrier needed for Object fields.
805 // Seems to be precise
806 post_barrier(addr, val.result());
807 }
808 }
809
810 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
811 assert(x->number_of_arguments() == 3, "wrong type");
812 assert(UseFMA, "Needs FMA instructions support.");
813 LIRItem value(x->argument_at(0), this);
814 LIRItem value1(x->argument_at(1), this);
815 LIRItem value2(x->argument_at(2), this);
816
817 value2.set_destroys_register();
818
819 value.load_item();
820 value1.load_item();
821 value2.load_item();
822
823 LIR_Opr calc_input = value.result();
824 LIR_Opr calc_input1 = value1.result();
825 LIR_Opr calc_input2 = value2.result();
826 LIR_Opr calc_result = rlock_result(x);
827
828 switch (x->id()) {
829 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
830 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
831 default: ShouldNotReachHere();
832 }
833
834 }
835
836
837 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
838 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
839
840 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
841 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
842 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
843 x->id() == vmIntrinsics::_dlog10) {
844 do_LibmIntrinsic(x);
845 return;
846 }
847
848 LIRItem value(x->argument_at(0), this);
849
850 bool use_fpu = false;
851 if (UseSSE < 2) {
852 value.set_destroys_register();
853 }
854 value.load_item();
855
856 LIR_Opr calc_input = value.result();
857 LIR_Opr calc_result = rlock_result(x);
858
859 switch(x->id()) {
860 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
861 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
862 default: ShouldNotReachHere();
863 }
864
865 if (use_fpu) {
866 __ move(calc_result, x->operand());
867 }
868 }
869
870 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
871 LIRItem value(x->argument_at(0), this);
872 value.set_destroys_register();
873
874 LIR_Opr calc_result = rlock_result(x);
875 LIR_Opr result_reg = result_register_for(x->type());
876
877 CallingConvention* cc = NULL;
878
879 if (x->id() == vmIntrinsics::_dpow) {
880 LIRItem value1(x->argument_at(1), this);
881
882 value1.set_destroys_register();
883
884 BasicTypeList signature(2);
885 signature.append(T_DOUBLE);
886 signature.append(T_DOUBLE);
887 cc = frame_map()->c_calling_convention(&signature);
888 value.load_item_force(cc->at(0));
889 value1.load_item_force(cc->at(1));
890 } else {
891 BasicTypeList signature(1);
892 signature.append(T_DOUBLE);
893 cc = frame_map()->c_calling_convention(&signature);
894 value.load_item_force(cc->at(0));
895 }
896
897 #ifndef _LP64
898 LIR_Opr tmp = FrameMap::fpu0_double_opr;
899 result_reg = tmp;
900 switch(x->id()) {
901 case vmIntrinsics::_dexp:
902 if (StubRoutines::dexp() != NULL) {
903 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
904 } else {
905 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
906 }
907 break;
908 case vmIntrinsics::_dlog:
909 if (StubRoutines::dlog() != NULL) {
910 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
911 } else {
912 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
913 }
914 break;
915 case vmIntrinsics::_dlog10:
916 if (StubRoutines::dlog10() != NULL) {
917 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
918 } else {
919 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
920 }
921 break;
922 case vmIntrinsics::_dpow:
923 if (StubRoutines::dpow() != NULL) {
924 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
925 } else {
926 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
927 }
928 break;
929 case vmIntrinsics::_dsin:
930 if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
931 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
932 } else {
933 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
934 }
935 break;
936 case vmIntrinsics::_dcos:
937 if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
938 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
939 } else {
940 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
941 }
942 break;
943 case vmIntrinsics::_dtan:
944 if (StubRoutines::dtan() != NULL) {
945 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
946 } else {
947 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
948 }
949 break;
950 default: ShouldNotReachHere();
951 }
952 #else
953 switch (x->id()) {
954 case vmIntrinsics::_dexp:
955 if (StubRoutines::dexp() != NULL) {
956 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
957 } else {
958 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
959 }
960 break;
961 case vmIntrinsics::_dlog:
962 if (StubRoutines::dlog() != NULL) {
963 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
964 } else {
965 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
966 }
967 break;
968 case vmIntrinsics::_dlog10:
969 if (StubRoutines::dlog10() != NULL) {
970 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
971 } else {
972 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
973 }
974 break;
975 case vmIntrinsics::_dpow:
976 if (StubRoutines::dpow() != NULL) {
977 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
978 } else {
979 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
980 }
981 break;
982 case vmIntrinsics::_dsin:
983 if (StubRoutines::dsin() != NULL) {
984 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
985 } else {
986 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
987 }
988 break;
989 case vmIntrinsics::_dcos:
990 if (StubRoutines::dcos() != NULL) {
991 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
992 } else {
993 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
994 }
995 break;
996 case vmIntrinsics::_dtan:
997 if (StubRoutines::dtan() != NULL) {
998 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
999 } else {
1000 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
1001 }
1002 break;
1003 default: ShouldNotReachHere();
1004 }
1005 #endif // _LP64
1006 __ move(result_reg, calc_result);
1007 }
1008
1009 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
1010 assert(x->number_of_arguments() == 5, "wrong type");
1011
1012 // Make all state_for calls early since they can emit code
1013 CodeEmitInfo* info = state_for(x, x->state());
1014
1015 LIRItem src(x->argument_at(0), this);
1016 LIRItem src_pos(x->argument_at(1), this);
1017 LIRItem dst(x->argument_at(2), this);
1018 LIRItem dst_pos(x->argument_at(3), this);
1019 LIRItem length(x->argument_at(4), this);
1020
1021 // operands for arraycopy must use fixed registers, otherwise
1022 // LinearScan will fail allocation (because arraycopy always needs a
1023 // call)
1024
1025 #ifndef _LP64
1026 src.load_item_force (FrameMap::rcx_oop_opr);
1027 src_pos.load_item_force (FrameMap::rdx_opr);
1028 dst.load_item_force (FrameMap::rax_oop_opr);
1029 dst_pos.load_item_force (FrameMap::rbx_opr);
1030 length.load_item_force (FrameMap::rdi_opr);
1031 LIR_Opr tmp = (FrameMap::rsi_opr);
1032 #else
1033
1034 // The java calling convention will give us enough registers
1035 // so that on the stub side the args will be perfect already.
1036 // On the other slow/special case side we call C and the arg
1037 // positions are not similar enough to pick one as the best.
1038 // Also because the java calling convention is a "shifted" version
1039 // of the C convention we can process the java args trivially into C
1040 // args without worry of overwriting during the xfer
1041
1042 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
1043 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
1044 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
1045 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
1046 length.load_item_force (FrameMap::as_opr(j_rarg4));
1047
1048 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
1049 #endif // LP64
1050
1051 set_no_result(x);
1052
1053 int flags;
1054 ciArrayKlass* expected_type;
1055 arraycopy_helper(x, &flags, &expected_type);
1056
1057 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
1058 }
1059
1060 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1061 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
1062 // Make all state_for calls early since they can emit code
1063 LIR_Opr result = rlock_result(x);
1064 int flags = 0;
1065 switch (x->id()) {
1066 case vmIntrinsics::_updateCRC32: {
1067 LIRItem crc(x->argument_at(0), this);
1068 LIRItem val(x->argument_at(1), this);
1069 // val is destroyed by update_crc32
1070 val.set_destroys_register();
1071 crc.load_item();
1072 val.load_item();
1073 __ update_crc32(crc.result(), val.result(), result);
1074 break;
1075 }
1076 case vmIntrinsics::_updateBytesCRC32:
1077 case vmIntrinsics::_updateByteBufferCRC32: {
1078 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1079
1080 LIRItem crc(x->argument_at(0), this);
1081 LIRItem buf(x->argument_at(1), this);
1082 LIRItem off(x->argument_at(2), this);
1083 LIRItem len(x->argument_at(3), this);
1084 buf.load_item();
1085 off.load_nonconstant();
1086
1087 LIR_Opr index = off.result();
1088 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1089 if(off.result()->is_constant()) {
1090 index = LIR_OprFact::illegalOpr;
1091 offset += off.result()->as_jint();
1092 }
1093 LIR_Opr base_op = buf.result();
1094
1095 #ifndef _LP64
1096 if (!is_updateBytes) { // long b raw address
1097 base_op = new_register(T_INT);
1098 __ convert(Bytecodes::_l2i, buf.result(), base_op);
1099 }
1100 #else
1101 if (index->is_valid()) {
1102 LIR_Opr tmp = new_register(T_LONG);
1103 __ convert(Bytecodes::_i2l, index, tmp);
1104 index = tmp;
1105 }
1106 #endif
1107
1108 LIR_Address* a = new LIR_Address(base_op,
1109 index,
1110 offset,
1111 T_BYTE);
1112 BasicTypeList signature(3);
1113 signature.append(T_INT);
1114 signature.append(T_ADDRESS);
1115 signature.append(T_INT);
1116 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1117 const LIR_Opr result_reg = result_register_for(x->type());
1118
1119 LIR_Opr addr = new_pointer_register();
1120 __ leal(LIR_OprFact::address(a), addr);
1121
1122 crc.load_item_force(cc->at(0));
1123 __ move(addr, cc->at(1));
1124 len.load_item_force(cc->at(2));
1125
1126 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1127 __ move(result_reg, result);
1128
1129 break;
1130 }
1131 default: {
1132 ShouldNotReachHere();
1133 }
1134 }
1135 }
1136
1137 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1138 Unimplemented();
1139 }
1140
1141 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1142 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1143
1144 // Make all state_for calls early since they can emit code
1145 LIR_Opr result = rlock_result(x);
1146
1147 LIRItem a(x->argument_at(0), this); // Object
1148 LIRItem aOffset(x->argument_at(1), this); // long
1149 LIRItem b(x->argument_at(2), this); // Object
1150 LIRItem bOffset(x->argument_at(3), this); // long
1151 LIRItem length(x->argument_at(4), this); // int
1152 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1153
1154 a.load_item();
1155 aOffset.load_nonconstant();
1156 b.load_item();
1157 bOffset.load_nonconstant();
1158
1159 long constant_aOffset = 0;
1160 LIR_Opr result_aOffset = aOffset.result();
1161 if (result_aOffset->is_constant()) {
1162 constant_aOffset = result_aOffset->as_jlong();
1163 result_aOffset = LIR_OprFact::illegalOpr;
1164 }
1165 LIR_Opr result_a = a.result();
1166
1167 long constant_bOffset = 0;
1168 LIR_Opr result_bOffset = bOffset.result();
1169 if (result_bOffset->is_constant()) {
1170 constant_bOffset = result_bOffset->as_jlong();
1171 result_bOffset = LIR_OprFact::illegalOpr;
1172 }
1173 LIR_Opr result_b = b.result();
1174
1175 #ifndef _LP64
1176 result_a = new_register(T_INT);
1177 __ convert(Bytecodes::_l2i, a.result(), result_a);
1178 result_b = new_register(T_INT);
1179 __ convert(Bytecodes::_l2i, b.result(), result_b);
1180 #endif
1181
1182
1183 LIR_Address* addr_a = new LIR_Address(result_a,
1184 result_aOffset,
1185 constant_aOffset,
1186 T_BYTE);
1187
1188 LIR_Address* addr_b = new LIR_Address(result_b,
1189 result_bOffset,
1190 constant_bOffset,
1191 T_BYTE);
1192
1193 BasicTypeList signature(4);
1194 signature.append(T_ADDRESS);
1195 signature.append(T_ADDRESS);
1196 signature.append(T_INT);
1197 signature.append(T_INT);
1198 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1199 const LIR_Opr result_reg = result_register_for(x->type());
1200
1201 LIR_Opr ptr_addr_a = new_pointer_register();
1202 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1203
1204 LIR_Opr ptr_addr_b = new_pointer_register();
1205 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1206
1207 __ move(ptr_addr_a, cc->at(0));
1208 __ move(ptr_addr_b, cc->at(1));
1209 length.load_item_force(cc->at(2));
1210 log2ArrayIndexScale.load_item_force(cc->at(3));
1211
1212 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1213 __ move(result_reg, result);
1214 }
1215
1216 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1217 // _i2b, _i2c, _i2s
1218 LIR_Opr fixed_register_for(BasicType type) {
1219 switch (type) {
1220 case T_FLOAT: return FrameMap::fpu0_float_opr;
1221 case T_DOUBLE: return FrameMap::fpu0_double_opr;
1222 case T_INT: return FrameMap::rax_opr;
1223 case T_LONG: return FrameMap::long0_opr;
1224 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1225 }
1226 }
1227
1228 void LIRGenerator::do_Convert(Convert* x) {
1229 // flags that vary for the different operations and different SSE-settings
1230 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1231
1232 switch (x->op()) {
1233 case Bytecodes::_i2l: // fall through
1234 case Bytecodes::_l2i: // fall through
1235 case Bytecodes::_i2b: // fall through
1236 case Bytecodes::_i2c: // fall through
1237 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1238
1239 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
1240 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1241 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
1242 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1243 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1244 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1245 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1246 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1247 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1248 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1249 default: ShouldNotReachHere();
1250 }
1251
1252 LIRItem value(x->value(), this);
1253 value.load_item();
1254 LIR_Opr input = value.result();
1255 LIR_Opr result = rlock(x);
1256
1257 // arguments of lir_convert
1258 LIR_Opr conv_input = input;
1259 LIR_Opr conv_result = result;
1260 ConversionStub* stub = NULL;
1261
1262 if (fixed_input) {
1263 conv_input = fixed_register_for(input->type());
1264 __ move(input, conv_input);
1265 }
1266
1267 assert(fixed_result == false || round_result == false, "cannot set both");
1268 if (fixed_result) {
1269 conv_result = fixed_register_for(result->type());
1270 } else if (round_result) {
1271 result = new_register(result->type());
1272 set_vreg_flag(result, must_start_in_memory);
1273 }
1274
1275 if (needs_stub) {
1276 stub = new ConversionStub(x->op(), conv_input, conv_result);
1277 }
1278
1279 __ convert(x->op(), conv_input, conv_result, stub);
1280
1281 if (result != conv_result) {
1282 __ move(conv_result, result);
1283 }
1284
1285 assert(result->is_virtual(), "result must be virtual register");
1286 set_result(x, result);
1287 }
1288
1289
1290 void LIRGenerator::do_NewInstance(NewInstance* x) {
1291 print_if_not_loaded(x);
1292
1293 CodeEmitInfo* info = state_for(x, x->state());
1294 LIR_Opr reg = result_register_for(x->type());
1295 new_instance(reg, x->klass(), x->is_unresolved(),
1296 FrameMap::rcx_oop_opr,
1297 FrameMap::rdi_oop_opr,
1298 FrameMap::rsi_oop_opr,
1299 LIR_OprFact::illegalOpr,
1300 FrameMap::rdx_metadata_opr, info);
1301 LIR_Opr result = rlock_result(x);
1302 __ move(reg, result);
1303 }
1304
1305
1306 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1307 CodeEmitInfo* info = state_for(x, x->state());
1308
1309 LIRItem length(x->length(), this);
1310 length.load_item_force(FrameMap::rbx_opr);
1311
1312 LIR_Opr reg = result_register_for(x->type());
1313 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1314 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1315 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1316 LIR_Opr tmp4 = reg;
1317 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1318 LIR_Opr len = length.result();
1319 BasicType elem_type = x->elt_type();
1320
1321 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1322
1323 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1324 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1325
1326 LIR_Opr result = rlock_result(x);
1327 __ move(reg, result);
1328 }
1329
1330
1331 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1332 LIRItem length(x->length(), this);
1333 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1334 // and therefore provide the state before the parameters have been consumed
1335 CodeEmitInfo* patching_info = NULL;
1336 if (!x->klass()->is_loaded() || PatchALot) {
1337 patching_info = state_for(x, x->state_before());
1338 }
1339
1340 CodeEmitInfo* info = state_for(x, x->state());
1341
1342 const LIR_Opr reg = result_register_for(x->type());
1343 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1344 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1345 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1346 LIR_Opr tmp4 = reg;
1347 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1348
1349 length.load_item_force(FrameMap::rbx_opr);
1350 LIR_Opr len = length.result();
1351
1352 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1353 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1354 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1355 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1356 }
1357 klass2reg_with_patching(klass_reg, obj, patching_info);
1358 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1359
1360 LIR_Opr result = rlock_result(x);
1361 __ move(reg, result);
1362 }
1363
1364
1365 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1366 Values* dims = x->dims();
1367 int i = dims->length();
1368 LIRItemList* items = new LIRItemList(i, i, NULL);
1369 while (i-- > 0) {
1370 LIRItem* size = new LIRItem(dims->at(i), this);
1371 items->at_put(i, size);
1372 }
1373
1374 // Evaluate state_for early since it may emit code.
1375 CodeEmitInfo* patching_info = NULL;
1376 if (!x->klass()->is_loaded() || PatchALot) {
1377 patching_info = state_for(x, x->state_before());
1378
1379 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1380 // clone all handlers (NOTE: Usually this is handled transparently
1381 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1382 // is done explicitly here because a stub isn't being used).
1383 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1384 }
1385 CodeEmitInfo* info = state_for(x, x->state());
1386
1387 i = dims->length();
1388 while (i-- > 0) {
1389 LIRItem* size = items->at(i);
1390 size->load_nonconstant();
1391
1392 store_stack_parameter(size->result(), in_ByteSize(i*4));
1393 }
1394
1395 LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1396 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1397
1398 LIR_Opr rank = FrameMap::rbx_opr;
1399 __ move(LIR_OprFact::intConst(x->rank()), rank);
1400 LIR_Opr varargs = FrameMap::rcx_opr;
1401 __ move(FrameMap::rsp_opr, varargs);
1402 LIR_OprList* args = new LIR_OprList(3);
1403 args->append(klass_reg);
1404 args->append(rank);
1405 args->append(varargs);
1406 LIR_Opr reg = result_register_for(x->type());
1407 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1408 LIR_OprFact::illegalOpr,
1409 reg, args, info);
1410
1411 LIR_Opr result = rlock_result(x);
1412 __ move(reg, result);
1413 }
1414
1415
1416 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1417 // nothing to do for now
1418 }
1419
1420
1421 void LIRGenerator::do_CheckCast(CheckCast* x) {
1422 LIRItem obj(x->obj(), this);
1423
1424 CodeEmitInfo* patching_info = NULL;
1425 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1426 // must do this before locking the destination register as an oop register,
1427 // and before the obj is loaded (the latter is for deoptimization)
1428 patching_info = state_for(x, x->state_before());
1429 }
1430 obj.load_item();
1431
1432 // info for exceptions
1433 CodeEmitInfo* info_for_exception =
1434 (x->needs_exception_state() ? state_for(x) :
1435 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1436
1437 CodeStub* stub;
1438 if (x->is_incompatible_class_change_check()) {
1439 assert(patching_info == NULL, "can't patch this");
1440 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1441 } else if (x->is_invokespecial_receiver_check()) {
1442 assert(patching_info == NULL, "can't patch this");
1443 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1444 } else {
1445 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1446 }
1447 LIR_Opr reg = rlock_result(x);
1448 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1449 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1450 tmp3 = new_register(objectType);
1451 }
1452 __ checkcast(reg, obj.result(), x->klass(),
1453 new_register(objectType), new_register(objectType), tmp3,
1454 x->direct_compare(), info_for_exception, patching_info, stub,
1455 x->profiled_method(), x->profiled_bci());
1456 }
1457
1458
1459 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1460 LIRItem obj(x->obj(), this);
1461
1462 // result and test object may not be in same register
1463 LIR_Opr reg = rlock_result(x);
1464 CodeEmitInfo* patching_info = NULL;
1465 if ((!x->klass()->is_loaded() || PatchALot)) {
1466 // must do this before locking the destination register as an oop register
1467 patching_info = state_for(x, x->state_before());
1468 }
1469 obj.load_item();
1470 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1471 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1472 tmp3 = new_register(objectType);
1473 }
1474 __ instanceof(reg, obj.result(), x->klass(),
1475 new_register(objectType), new_register(objectType), tmp3,
1476 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1477 }
1478
1479
1480 void LIRGenerator::do_If(If* x) {
1481 assert(x->number_of_sux() == 2, "inconsistency");
1482 ValueTag tag = x->x()->type()->tag();
1483 bool is_safepoint = x->is_safepoint();
1484
1485 If::Condition cond = x->cond();
1486
1487 LIRItem xitem(x->x(), this);
1488 LIRItem yitem(x->y(), this);
1489 LIRItem* xin = &xitem;
1490 LIRItem* yin = &yitem;
1491
1492 if (tag == longTag) {
1493 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1494 // mirror for other conditions
1495 if (cond == If::gtr || cond == If::leq) {
1496 cond = Instruction::mirror(cond);
1497 xin = &yitem;
1498 yin = &xitem;
1499 }
1500 xin->set_destroys_register();
1501 }
1502 xin->load_item();
1503 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1504 // inline long zero
1505 yin->dont_load_item();
1506 } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1507 // longs cannot handle constants at right side
1508 yin->load_item();
1509 } else {
1510 yin->dont_load_item();
1511 }
1512
1513 // add safepoint before generating condition code so it can be recomputed
1514 if (x->is_safepoint()) {
1515 // increment backedge counter if needed
1516 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1517 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1518 }
1519 set_no_result(x);
1520
1521 LIR_Opr left = xin->result();
1522 LIR_Opr right = yin->result();
1523 __ cmp(lir_cond(cond), left, right);
1524 // Generate branch profiling. Profiling code doesn't kill flags.
1525 profile_branch(x, cond);
1526 move_to_phi(x->state());
1527 if (x->x()->type()->is_float_kind()) {
1528 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1529 } else {
1530 __ branch(lir_cond(cond), right->type(), x->tsux());
1531 }
1532 assert(x->default_sux() == x->fsux(), "wrong destination above");
1533 __ jump(x->default_sux());
1534 }
1535
1536
1537 LIR_Opr LIRGenerator::getThreadPointer() {
1538 #ifdef _LP64
1539 return FrameMap::as_pointer_opr(r15_thread);
1540 #else
1541 LIR_Opr result = new_register(T_INT);
1542 __ get_thread(result);
1543 return result;
1544 #endif //
1545 }
1546
1547 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1548 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1549 LIR_OprList* args = new LIR_OprList();
1550 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1551 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1552 }
1553
1554
1555 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1556 CodeEmitInfo* info) {
1557 if (address->type() == T_LONG) {
1558 address = new LIR_Address(address->base(),
1559 address->index(), address->scale(),
1560 address->disp(), T_DOUBLE);
1561 // Transfer the value atomically by using FP moves. This means
1562 // the value has to be moved between CPU and FPU registers. It
1563 // always has to be moved through spill slot since there's no
1564 // quick way to pack the value into an SSE register.
1565 LIR_Opr temp_double = new_register(T_DOUBLE);
1566 LIR_Opr spill = new_register(T_LONG);
1567 set_vreg_flag(spill, must_start_in_memory);
1568 __ move(value, spill);
1569 __ volatile_move(spill, temp_double, T_LONG);
1570 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1571 } else {
1572 __ store(value, address, info);
1573 }
1574 }
1575
1576
1577
1578 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1579 CodeEmitInfo* info) {
1580 if (address->type() == T_LONG) {
1581 address = new LIR_Address(address->base(),
1582 address->index(), address->scale(),
1583 address->disp(), T_DOUBLE);
1584 // Transfer the value atomically by using FP moves. This means
1585 // the value has to be moved between CPU and FPU registers. In
1586 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1587 // SSE2+ mode it can be moved directly.
1588 LIR_Opr temp_double = new_register(T_DOUBLE);
1589 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1590 __ volatile_move(temp_double, result, T_LONG);
1591 if (UseSSE < 2) {
1592 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1593 set_vreg_flag(result, must_start_in_memory);
1594 }
1595 } else {
1596 __ load(address, result, info);
1597 }
1598 }
1599
1600 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1601 BasicType type, bool is_volatile) {
1602 if (is_volatile && type == T_LONG) {
1603 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1604 LIR_Opr tmp = new_register(T_DOUBLE);
1605 __ load(addr, tmp);
1606 LIR_Opr spill = new_register(T_LONG);
1607 set_vreg_flag(spill, must_start_in_memory);
1608 __ move(tmp, spill);
1609 __ move(spill, dst);
1610 } else {
1611 LIR_Address* addr = new LIR_Address(src, offset, type);
1612 __ load(addr, dst);
1613 }
1614 }
1615
1616
1617 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1618 BasicType type, bool is_volatile) {
1619 if (is_volatile && type == T_LONG) {
1620 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1621 LIR_Opr tmp = new_register(T_DOUBLE);
1622 LIR_Opr spill = new_register(T_DOUBLE);
1623 set_vreg_flag(spill, must_start_in_memory);
1624 __ move(data, spill);
1625 __ move(spill, tmp);
1626 __ move(tmp, addr);
1627 } else {
1628 LIR_Address* addr = new LIR_Address(src, offset, type);
1629 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1630 if (is_obj) {
1631 // Do the pre-write barrier, if any.
1632 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1633 true /* do_load */, false /* patch */, NULL);
1634 __ move(data, addr);
1635 assert(src->is_register(), "must be register");
1636 // Seems to be a precise address
1637 post_barrier(LIR_OprFact::address(addr), data);
1638 } else {
1639 __ move(data, addr);
1640 }
1641 }
1642 }
1643
1644 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1645 BasicType type = x->basic_type();
1646 LIRItem src(x->object(), this);
1647 LIRItem off(x->offset(), this);
1648 LIRItem value(x->value(), this);
1649
1650 src.load_item();
1651 value.load_item();
1652 off.load_nonconstant();
1653
1654 LIR_Opr dst = rlock_result(x, type);
1655 LIR_Opr data = value.result();
1656 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1657 LIR_Opr offset = off.result();
1658
1659 assert (type == T_INT || (!x->is_add() && is_obj) LP64_ONLY( || type == T_LONG ), "unexpected type");
1660 LIR_Address* addr;
1661 if (offset->is_constant()) {
1662 #ifdef _LP64
1663 jlong c = offset->as_jlong();
1664 if ((jlong)((jint)c) == c) {
1665 addr = new LIR_Address(src.result(), (jint)c, type);
1666 } else {
1667 LIR_Opr tmp = new_register(T_LONG);
1668 __ move(offset, tmp);
1669 addr = new LIR_Address(src.result(), tmp, type);
1670 }
1671 #else
1672 addr = new LIR_Address(src.result(), offset->as_jint(), type);
1673 #endif
1674 } else {
1675 addr = new LIR_Address(src.result(), offset, type);
1676 }
1677
1678 // Because we want a 2-arg form of xchg and xadd
1679 __ move(data, dst);
1680
1681 if (x->is_add()) {
1682 __ xadd(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1683 } else {
1684 if (is_obj) {
1685 // Do the pre-write barrier, if any.
1686 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1687 true /* do_load */, false /* patch */, NULL);
1688 }
1689 __ xchg(LIR_OprFact::address(addr), dst, dst, LIR_OprFact::illegalOpr);
1690 if (is_obj) {
1691 // Seems to be a precise address
1692 post_barrier(LIR_OprFact::address(addr), data);
1693 }
1694 }
1695 }