--- old/src/hotspot/cpu/aarch64/gc/shenandoah/c1/shenandoahBarrierSetC1_aarch64.cpp 2019-09-11 09:45:59.413360007 -0400 +++ new/src/hotspot/cpu/aarch64/gc/shenandoah/c1/shenandoahBarrierSetC1_aarch64.cpp 2019-09-11 09:45:58.921025755 -0400 @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, Red Hat, Inc. All rights reserved. + * Copyright (c) 2018, 2019, Red Hat, Inc. All rights reserved. * * This code is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 only, as @@ -94,7 +94,7 @@ value_opr = storeval_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators()); } - assert(type == T_INT || type == T_OBJECT || type == T_ARRAY LP64_ONLY( || type == T_LONG ), "unexpected type"); + assert(type == T_INT || is_reference_type(type) LP64_ONLY( || type == T_LONG ), "unexpected type"); LIR_Opr tmp = gen->new_register(T_INT); __ xchg(access.resolved_addr(), value_opr, result, tmp);