1 /* 2 * Copyright (c) 2000, 2018, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef SHARE_VM_C1_C1_LIR_HPP 26 #define SHARE_VM_C1_C1_LIR_HPP 27 28 #include "c1/c1_Defs.hpp" 29 #include "c1/c1_ValueType.hpp" 30 #include "oops/method.hpp" 31 #include "utilities/globalDefinitions.hpp" 32 33 class BlockBegin; 34 class BlockList; 35 class LIR_Assembler; 36 class CodeEmitInfo; 37 class CodeStub; 38 class CodeStubList; 39 class ArrayCopyStub; 40 class LIR_Op; 41 class ciType; 42 class ValueType; 43 class LIR_OpVisitState; 44 class FpuStackSim; 45 46 //--------------------------------------------------------------------- 47 // LIR Operands 48 // LIR_OprDesc 49 // LIR_OprPtr 50 // LIR_Const 51 // LIR_Address 52 //--------------------------------------------------------------------- 53 class LIR_OprDesc; 54 class LIR_OprPtr; 55 class LIR_Const; 56 class LIR_Address; 57 class LIR_OprVisitor; 58 59 60 typedef LIR_OprDesc* LIR_Opr; 61 typedef int RegNr; 62 63 typedef GrowableArray<LIR_Opr> LIR_OprList; 64 typedef GrowableArray<LIR_Op*> LIR_OpArray; 65 typedef GrowableArray<LIR_Op*> LIR_OpList; 66 67 // define LIR_OprPtr early so LIR_OprDesc can refer to it 68 class LIR_OprPtr: public CompilationResourceObj { 69 public: 70 bool is_oop_pointer() const { return (type() == T_OBJECT); } 71 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); } 72 73 virtual LIR_Const* as_constant() { return NULL; } 74 virtual LIR_Address* as_address() { return NULL; } 75 virtual BasicType type() const = 0; 76 virtual void print_value_on(outputStream* out) const = 0; 77 }; 78 79 80 81 // LIR constants 82 class LIR_Const: public LIR_OprPtr { 83 private: 84 JavaValue _value; 85 86 void type_check(BasicType t) const { assert(type() == t, "type check"); } 87 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); } 88 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); } 89 90 public: 91 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); } 92 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); } 93 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); } 94 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); } 95 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); } 96 LIR_Const(void* p) { 97 #ifdef _LP64 98 assert(sizeof(jlong) >= sizeof(p), "too small");; 99 _value.set_type(T_LONG); _value.set_jlong((jlong)p); 100 #else 101 assert(sizeof(jint) >= sizeof(p), "too small");; 102 _value.set_type(T_INT); _value.set_jint((jint)p); 103 #endif 104 } 105 LIR_Const(Metadata* m) { 106 _value.set_type(T_METADATA); 107 #ifdef _LP64 108 _value.set_jlong((jlong)m); 109 #else 110 _value.set_jint((jint)m); 111 #endif // _LP64 112 } 113 114 virtual BasicType type() const { return _value.get_type(); } 115 virtual LIR_Const* as_constant() { return this; } 116 117 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); } 118 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); } 119 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); } 120 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); } 121 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); } 122 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); } 123 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); } 124 125 #ifdef _LP64 126 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); } 127 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jlong(); } 128 #else 129 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); } 130 Metadata* as_metadata() const { type_check(T_METADATA); return (Metadata*)_value.get_jint(); } 131 #endif 132 133 134 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); } 135 jint as_jint_lo_bits() const { 136 if (type() == T_DOUBLE) { 137 return low(jlong_cast(_value.get_jdouble())); 138 } else { 139 return as_jint_lo(); 140 } 141 } 142 jint as_jint_hi_bits() const { 143 if (type() == T_DOUBLE) { 144 return high(jlong_cast(_value.get_jdouble())); 145 } else { 146 return as_jint_hi(); 147 } 148 } 149 jlong as_jlong_bits() const { 150 if (type() == T_DOUBLE) { 151 return jlong_cast(_value.get_jdouble()); 152 } else { 153 return as_jlong(); 154 } 155 } 156 157 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; 158 159 160 bool is_zero_float() { 161 jfloat f = as_jfloat(); 162 jfloat ok = 0.0f; 163 return jint_cast(f) == jint_cast(ok); 164 } 165 166 bool is_one_float() { 167 jfloat f = as_jfloat(); 168 return !g_isnan(f) && g_isfinite(f) && f == 1.0; 169 } 170 171 bool is_zero_double() { 172 jdouble d = as_jdouble(); 173 jdouble ok = 0.0; 174 return jlong_cast(d) == jlong_cast(ok); 175 } 176 177 bool is_one_double() { 178 jdouble d = as_jdouble(); 179 return !g_isnan(d) && g_isfinite(d) && d == 1.0; 180 } 181 }; 182 183 184 //---------------------LIR Operand descriptor------------------------------------ 185 // 186 // The class LIR_OprDesc represents a LIR instruction operand; 187 // it can be a register (ALU/FPU), stack location or a constant; 188 // Constants and addresses are represented as resource area allocated 189 // structures (see above). 190 // Registers and stack locations are inlined into the this pointer 191 // (see value function). 192 193 class LIR_OprDesc: public CompilationResourceObj { 194 public: 195 // value structure: 196 // data opr-type opr-kind 197 // +--------------+-------+-------+ 198 // [max...........|7 6 5 4|3 2 1 0] 199 // ^ 200 // is_pointer bit 201 // 202 // lowest bit cleared, means it is a structure pointer 203 // we need 4 bits to represent types 204 205 private: 206 friend class LIR_OprFact; 207 208 // Conversion 209 intptr_t value() const { return (intptr_t) this; } 210 211 bool check_value_mask(intptr_t mask, intptr_t masked_value) const { 212 return (value() & mask) == masked_value; 213 } 214 215 enum OprKind { 216 pointer_value = 0 217 , stack_value = 1 218 , cpu_register = 3 219 , fpu_register = 5 220 , illegal_value = 7 221 }; 222 223 enum OprBits { 224 pointer_bits = 1 225 , kind_bits = 3 226 , type_bits = 4 227 , size_bits = 2 228 , destroys_bits = 1 229 , virtual_bits = 1 230 , is_xmm_bits = 1 231 , last_use_bits = 1 232 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation 233 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits + 234 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits 235 , data_bits = BitsPerInt - non_data_bits 236 , reg_bits = data_bits / 2 // for two registers in one value encoding 237 }; 238 239 enum OprShift { 240 kind_shift = 0 241 , type_shift = kind_shift + kind_bits 242 , size_shift = type_shift + type_bits 243 , destroys_shift = size_shift + size_bits 244 , last_use_shift = destroys_shift + destroys_bits 245 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits 246 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits 247 , is_xmm_shift = virtual_shift + virtual_bits 248 , data_shift = is_xmm_shift + is_xmm_bits 249 , reg1_shift = data_shift 250 , reg2_shift = data_shift + reg_bits 251 252 }; 253 254 enum OprSize { 255 single_size = 0 << size_shift 256 , double_size = 1 << size_shift 257 }; 258 259 enum OprMask { 260 kind_mask = right_n_bits(kind_bits) 261 , type_mask = right_n_bits(type_bits) << type_shift 262 , size_mask = right_n_bits(size_bits) << size_shift 263 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift 264 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift 265 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift 266 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift 267 , pointer_mask = right_n_bits(pointer_bits) 268 , lower_reg_mask = right_n_bits(reg_bits) 269 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask)) 270 }; 271 272 uintptr_t data() const { return value() >> data_shift; } 273 int lo_reg_half() const { return data() & lower_reg_mask; } 274 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; } 275 OprKind kind_field() const { return (OprKind)(value() & kind_mask); } 276 OprSize size_field() const { return (OprSize)(value() & size_mask); } 277 278 static char type_char(BasicType t); 279 280 public: 281 enum { 282 vreg_base = ConcreteRegisterImpl::number_of_registers, 283 vreg_max = (1 << data_bits) - 1 284 }; 285 286 static inline LIR_Opr illegalOpr(); 287 288 enum OprType { 289 unknown_type = 0 << type_shift // means: not set (catch uninitialized types) 290 , int_type = 1 << type_shift 291 , long_type = 2 << type_shift 292 , object_type = 3 << type_shift 293 , address_type = 4 << type_shift 294 , float_type = 5 << type_shift 295 , double_type = 6 << type_shift 296 , metadata_type = 7 << type_shift 297 }; 298 friend OprType as_OprType(BasicType t); 299 friend BasicType as_BasicType(OprType t); 300 301 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); } 302 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); } 303 304 static OprSize size_for(BasicType t) { 305 switch (t) { 306 case T_LONG: 307 case T_DOUBLE: 308 return double_size; 309 break; 310 311 case T_FLOAT: 312 case T_BOOLEAN: 313 case T_CHAR: 314 case T_BYTE: 315 case T_SHORT: 316 case T_INT: 317 case T_ADDRESS: 318 case T_OBJECT: 319 case T_ARRAY: 320 case T_METADATA: 321 return single_size; 322 break; 323 324 default: 325 ShouldNotReachHere(); 326 return single_size; 327 } 328 } 329 330 331 void validate_type() const PRODUCT_RETURN; 332 333 BasicType type() const { 334 if (is_pointer()) { 335 return pointer()->type(); 336 } 337 return as_BasicType(type_field()); 338 } 339 340 341 ValueType* value_type() const { return as_ValueType(type()); } 342 343 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); } 344 345 bool is_equal(LIR_Opr opr) const { return this == opr; } 346 // checks whether types are same 347 bool is_same_type(LIR_Opr opr) const { 348 assert(type_field() != unknown_type && 349 opr->type_field() != unknown_type, "shouldn't see unknown_type"); 350 return type_field() == opr->type_field(); 351 } 352 bool is_same_register(LIR_Opr opr) { 353 return (is_register() && opr->is_register() && 354 kind_field() == opr->kind_field() && 355 (value() & no_type_mask) == (opr->value() & no_type_mask)); 356 } 357 358 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); } 359 bool is_illegal() const { return kind_field() == illegal_value; } 360 bool is_valid() const { return kind_field() != illegal_value; } 361 362 bool is_register() const { return is_cpu_register() || is_fpu_register(); } 363 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); } 364 365 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; } 366 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; } 367 368 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); } 369 bool is_oop() const; 370 371 // semantic for fpu- and xmm-registers: 372 // * is_float and is_double return true for xmm_registers 373 // (so is_single_fpu and is_single_xmm are true) 374 // * So you must always check for is_???_xmm prior to is_???_fpu to 375 // distinguish between fpu- and xmm-registers 376 377 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); } 378 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); } 379 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); } 380 381 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); } 382 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); } 383 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); } 384 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); } 385 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); } 386 387 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); } 388 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); } 389 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); } 390 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); } 391 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); } 392 393 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); } 394 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); } 395 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); } 396 397 // fast accessor functions for special bits that do not work for pointers 398 // (in this functions, the check for is_pointer() is omitted) 399 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); } 400 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); } 401 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); } 402 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; } 403 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); } 404 405 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; } 406 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; } 407 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); } 408 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); } 409 410 411 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); } 412 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); } 413 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); } 414 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } 415 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } 416 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); } 417 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } 418 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } 419 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); } 420 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); } 421 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); } 422 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); } 423 424 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; } 425 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); } 426 LIR_Address* as_address_ptr() const { return pointer()->as_address(); } 427 428 Register as_register() const; 429 Register as_register_lo() const; 430 Register as_register_hi() const; 431 432 Register as_pointer_register() { 433 #ifdef _LP64 434 if (is_double_cpu()) { 435 assert(as_register_lo() == as_register_hi(), "should be a single register"); 436 return as_register_lo(); 437 } 438 #endif 439 return as_register(); 440 } 441 442 FloatRegister as_float_reg () const; 443 FloatRegister as_double_reg () const; 444 #ifdef X86 445 XMMRegister as_xmm_float_reg () const; 446 XMMRegister as_xmm_double_reg() const; 447 // for compatibility with RInfo 448 int fpu() const { return lo_reg_half(); } 449 #endif 450 451 jint as_jint() const { return as_constant_ptr()->as_jint(); } 452 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); } 453 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); } 454 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); } 455 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); } 456 457 void print() const PRODUCT_RETURN; 458 void print(outputStream* out) const PRODUCT_RETURN; 459 }; 460 461 462 inline LIR_OprDesc::OprType as_OprType(BasicType type) { 463 switch (type) { 464 case T_INT: return LIR_OprDesc::int_type; 465 case T_LONG: return LIR_OprDesc::long_type; 466 case T_FLOAT: return LIR_OprDesc::float_type; 467 case T_DOUBLE: return LIR_OprDesc::double_type; 468 case T_OBJECT: 469 case T_ARRAY: return LIR_OprDesc::object_type; 470 case T_ADDRESS: return LIR_OprDesc::address_type; 471 case T_METADATA: return LIR_OprDesc::metadata_type; 472 case T_ILLEGAL: // fall through 473 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type; 474 } 475 } 476 477 inline BasicType as_BasicType(LIR_OprDesc::OprType t) { 478 switch (t) { 479 case LIR_OprDesc::int_type: return T_INT; 480 case LIR_OprDesc::long_type: return T_LONG; 481 case LIR_OprDesc::float_type: return T_FLOAT; 482 case LIR_OprDesc::double_type: return T_DOUBLE; 483 case LIR_OprDesc::object_type: return T_OBJECT; 484 case LIR_OprDesc::address_type: return T_ADDRESS; 485 case LIR_OprDesc::metadata_type:return T_METADATA; 486 case LIR_OprDesc::unknown_type: // fall through 487 default: ShouldNotReachHere(); return T_ILLEGAL; 488 } 489 } 490 491 492 // LIR_Address 493 class LIR_Address: public LIR_OprPtr { 494 friend class LIR_OpVisitState; 495 496 public: 497 // NOTE: currently these must be the log2 of the scale factor (and 498 // must also be equivalent to the ScaleFactor enum in 499 // assembler_i486.hpp) 500 enum Scale { 501 times_1 = 0, 502 times_2 = 1, 503 times_4 = 2, 504 times_8 = 3 505 }; 506 507 private: 508 LIR_Opr _base; 509 LIR_Opr _index; 510 Scale _scale; 511 intx _disp; 512 BasicType _type; 513 514 public: 515 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type): 516 _base(base) 517 , _index(index) 518 , _scale(times_1) 519 , _disp(0) 520 , _type(type) { verify(); } 521 522 LIR_Address(LIR_Opr base, intx disp, BasicType type): 523 _base(base) 524 , _index(LIR_OprDesc::illegalOpr()) 525 , _scale(times_1) 526 , _disp(disp) 527 , _type(type) { verify(); } 528 529 LIR_Address(LIR_Opr base, BasicType type): 530 _base(base) 531 , _index(LIR_OprDesc::illegalOpr()) 532 , _scale(times_1) 533 , _disp(0) 534 , _type(type) { verify(); } 535 536 LIR_Address(LIR_Opr base, LIR_Opr index, intx disp, BasicType type): 537 _base(base) 538 , _index(index) 539 , _scale(times_1) 540 , _disp(disp) 541 , _type(type) { verify(); } 542 543 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type): 544 _base(base) 545 , _index(index) 546 , _scale(scale) 547 , _disp(disp) 548 , _type(type) { verify(); } 549 550 LIR_Opr base() const { return _base; } 551 LIR_Opr index() const { return _index; } 552 Scale scale() const { return _scale; } 553 intx disp() const { return _disp; } 554 555 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); } 556 557 virtual LIR_Address* as_address() { return this; } 558 virtual BasicType type() const { return _type; } 559 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN; 560 561 void verify() const PRODUCT_RETURN; 562 563 static Scale scale(BasicType type); 564 }; 565 566 567 // operand factory 568 class LIR_OprFact: public AllStatic { 569 public: 570 571 static LIR_Opr illegalOpr; 572 573 static LIR_Opr single_cpu(int reg) { 574 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 575 LIR_OprDesc::int_type | 576 LIR_OprDesc::cpu_register | 577 LIR_OprDesc::single_size); 578 } 579 static LIR_Opr single_cpu_oop(int reg) { 580 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 581 LIR_OprDesc::object_type | 582 LIR_OprDesc::cpu_register | 583 LIR_OprDesc::single_size); 584 } 585 static LIR_Opr single_cpu_address(int reg) { 586 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 587 LIR_OprDesc::address_type | 588 LIR_OprDesc::cpu_register | 589 LIR_OprDesc::single_size); 590 } 591 static LIR_Opr single_cpu_metadata(int reg) { 592 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 593 LIR_OprDesc::metadata_type | 594 LIR_OprDesc::cpu_register | 595 LIR_OprDesc::single_size); 596 } 597 static LIR_Opr double_cpu(int reg1, int reg2) { 598 LP64_ONLY(assert(reg1 == reg2, "must be identical")); 599 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | 600 (reg2 << LIR_OprDesc::reg2_shift) | 601 LIR_OprDesc::long_type | 602 LIR_OprDesc::cpu_register | 603 LIR_OprDesc::double_size); 604 } 605 606 static LIR_Opr single_fpu(int reg) { 607 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 608 LIR_OprDesc::float_type | 609 LIR_OprDesc::fpu_register | 610 LIR_OprDesc::single_size); 611 } 612 613 // Platform dependant. 614 static LIR_Opr double_fpu(int reg1, int reg2 = -1 /*fnoreg*/); 615 616 #ifdef ARM32 617 static LIR_Opr single_softfp(int reg) { 618 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 619 LIR_OprDesc::float_type | 620 LIR_OprDesc::cpu_register | 621 LIR_OprDesc::single_size); 622 } 623 static LIR_Opr double_softfp(int reg1, int reg2) { 624 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) | 625 (reg2 << LIR_OprDesc::reg2_shift) | 626 LIR_OprDesc::double_type | 627 LIR_OprDesc::cpu_register | 628 LIR_OprDesc::double_size); 629 } 630 #endif // ARM32 631 632 #if defined(X86) 633 static LIR_Opr single_xmm(int reg) { 634 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 635 LIR_OprDesc::float_type | 636 LIR_OprDesc::fpu_register | 637 LIR_OprDesc::single_size | 638 LIR_OprDesc::is_xmm_mask); 639 } 640 static LIR_Opr double_xmm(int reg) { 641 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) | 642 (reg << LIR_OprDesc::reg2_shift) | 643 LIR_OprDesc::double_type | 644 LIR_OprDesc::fpu_register | 645 LIR_OprDesc::double_size | 646 LIR_OprDesc::is_xmm_mask); 647 } 648 #endif // X86 649 650 static LIR_Opr virtual_register(int index, BasicType type) { 651 LIR_Opr res; 652 switch (type) { 653 case T_OBJECT: // fall through 654 case T_ARRAY: 655 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 656 LIR_OprDesc::object_type | 657 LIR_OprDesc::cpu_register | 658 LIR_OprDesc::single_size | 659 LIR_OprDesc::virtual_mask); 660 break; 661 662 case T_METADATA: 663 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 664 LIR_OprDesc::metadata_type| 665 LIR_OprDesc::cpu_register | 666 LIR_OprDesc::single_size | 667 LIR_OprDesc::virtual_mask); 668 break; 669 670 case T_INT: 671 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 672 LIR_OprDesc::int_type | 673 LIR_OprDesc::cpu_register | 674 LIR_OprDesc::single_size | 675 LIR_OprDesc::virtual_mask); 676 break; 677 678 case T_ADDRESS: 679 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 680 LIR_OprDesc::address_type | 681 LIR_OprDesc::cpu_register | 682 LIR_OprDesc::single_size | 683 LIR_OprDesc::virtual_mask); 684 break; 685 686 case T_LONG: 687 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 688 LIR_OprDesc::long_type | 689 LIR_OprDesc::cpu_register | 690 LIR_OprDesc::double_size | 691 LIR_OprDesc::virtual_mask); 692 break; 693 694 #ifdef __SOFTFP__ 695 case T_FLOAT: 696 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 697 LIR_OprDesc::float_type | 698 LIR_OprDesc::cpu_register | 699 LIR_OprDesc::single_size | 700 LIR_OprDesc::virtual_mask); 701 break; 702 case T_DOUBLE: 703 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 704 LIR_OprDesc::double_type | 705 LIR_OprDesc::cpu_register | 706 LIR_OprDesc::double_size | 707 LIR_OprDesc::virtual_mask); 708 break; 709 #else // __SOFTFP__ 710 case T_FLOAT: 711 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 712 LIR_OprDesc::float_type | 713 LIR_OprDesc::fpu_register | 714 LIR_OprDesc::single_size | 715 LIR_OprDesc::virtual_mask); 716 break; 717 718 case 719 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 720 LIR_OprDesc::double_type | 721 LIR_OprDesc::fpu_register | 722 LIR_OprDesc::double_size | 723 LIR_OprDesc::virtual_mask); 724 break; 725 #endif // __SOFTFP__ 726 default: ShouldNotReachHere(); res = illegalOpr; 727 } 728 729 #ifdef ASSERT 730 res->validate_type(); 731 assert(res->vreg_number() == index, "conversion check"); 732 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base"); 733 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); 734 735 // old-style calculation; check if old and new method are equal 736 LIR_OprDesc::OprType t = as_OprType(type); 737 #ifdef __SOFTFP__ 738 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 739 t | 740 LIR_OprDesc::cpu_register | 741 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); 742 #else // __SOFTFP__ 743 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t | 744 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) | 745 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask); 746 assert(res == old_res, "old and new method not equal"); 747 #endif // __SOFTFP__ 748 #endif // ASSERT 749 750 return res; 751 } 752 753 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as 754 // the index is platform independent; a double stack useing indeces 2 and 3 has always 755 // index 2. 756 static LIR_Opr stack(int index, BasicType type) { 757 LIR_Opr res; 758 switch (type) { 759 case T_OBJECT: // fall through 760 case T_ARRAY: 761 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 762 LIR_OprDesc::object_type | 763 LIR_OprDesc::stack_value | 764 LIR_OprDesc::single_size); 765 break; 766 767 case T_METADATA: 768 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 769 LIR_OprDesc::metadata_type | 770 LIR_OprDesc::stack_value | 771 LIR_OprDesc::single_size); 772 break; 773 case T_INT: 774 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 775 LIR_OprDesc::int_type | 776 LIR_OprDesc::stack_value | 777 LIR_OprDesc::single_size); 778 break; 779 780 case T_ADDRESS: 781 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 782 LIR_OprDesc::address_type | 783 LIR_OprDesc::stack_value | 784 LIR_OprDesc::single_size); 785 break; 786 787 case T_LONG: 788 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 789 LIR_OprDesc::long_type | 790 LIR_OprDesc::stack_value | 791 LIR_OprDesc::double_size); 792 break; 793 794 case T_FLOAT: 795 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 796 LIR_OprDesc::float_type | 797 LIR_OprDesc::stack_value | 798 LIR_OprDesc::single_size); 799 break; 800 case T_DOUBLE: 801 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 802 LIR_OprDesc::double_type | 803 LIR_OprDesc::stack_value | 804 LIR_OprDesc::double_size); 805 break; 806 807 default: ShouldNotReachHere(); res = illegalOpr; 808 } 809 810 #ifdef ASSERT 811 assert(index >= 0, "index must be positive"); 812 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big"); 813 814 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | 815 LIR_OprDesc::stack_value | 816 as_OprType(type) | 817 LIR_OprDesc::size_for(type)); 818 assert(res == old_res, "old and new method not equal"); 819 #endif 820 821 return res; 822 } 823 824 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); } 825 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); } 826 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); } 827 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); } 828 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); } 829 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; } 830 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); } 831 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); } 832 static LIR_Opr illegal() { return (LIR_Opr)-1; } 833 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); } 834 static LIR_Opr metadataConst(Metadata* m) { return (LIR_Opr)(new LIR_Const(m)); } 835 836 static LIR_Opr value_type(ValueType* type); 837 static LIR_Opr dummy_value_type(ValueType* type); 838 }; 839 840 841 //------------------------------------------------------------------------------- 842 // LIR Instructions 843 //------------------------------------------------------------------------------- 844 // 845 // Note: 846 // - every instruction has a result operand 847 // - every instruction has an CodeEmitInfo operand (can be revisited later) 848 // - every instruction has a LIR_OpCode operand 849 // - LIR_OpN, means an instruction that has N input operands 850 // 851 // class hierarchy: 852 // 853 class LIR_Op; 854 class LIR_Op0; 855 class LIR_OpLabel; 856 class LIR_Op1; 857 class LIR_OpBranch; 858 class LIR_OpConvert; 859 class LIR_OpAllocObj; 860 class LIR_OpRoundFP; 861 class LIR_Op2; 862 class LIR_OpDelay; 863 class LIR_Op3; 864 class LIR_OpAllocArray; 865 class LIR_OpCall; 866 class LIR_OpJavaCall; 867 class LIR_OpRTCall; 868 class LIR_OpArrayCopy; 869 class LIR_OpUpdateCRC32; 870 class LIR_OpLock; 871 class LIR_OpTypeCheck; 872 class LIR_OpCompareAndSwap; 873 class LIR_OpProfileCall; 874 class LIR_OpProfileType; 875 #ifdef ASSERT 876 class LIR_OpAssert; 877 #endif 878 879 // LIR operation codes 880 enum LIR_Code { 881 lir_none 882 , begin_op0 883 , lir_word_align 884 , lir_label 885 , lir_nop 886 , lir_backwardbranch_target 887 , lir_std_entry 888 , lir_osr_entry 889 , lir_build_frame 890 , lir_fpop_raw 891 , lir_24bit_FPU 892 , lir_reset_FPU 893 , lir_breakpoint 894 , lir_rtcall 895 , lir_membar 896 , lir_membar_acquire 897 , lir_membar_release 898 , lir_membar_loadload 899 , lir_membar_storestore 900 , lir_membar_loadstore 901 , lir_membar_storeload 902 , lir_get_thread 903 , lir_on_spin_wait 904 , end_op0 905 , begin_op1 906 , lir_fxch 907 , lir_fld 908 , lir_ffree 909 , lir_push 910 , lir_pop 911 , lir_null_check 912 , lir_return 913 , lir_leal 914 , lir_neg 915 , lir_branch 916 , lir_cond_float_branch 917 , lir_move 918 , lir_convert 919 , lir_alloc_object 920 , lir_monaddr 921 , lir_roundfp 922 , lir_safepoint 923 , lir_pack64 924 , lir_unpack64 925 , lir_unwind 926 , end_op1 927 , begin_op2 928 , lir_cmp 929 , lir_cmp_l2i 930 , lir_ucmp_fd2i 931 , lir_cmp_fd2i 932 , lir_cmove 933 , lir_add 934 , lir_sub 935 , lir_mul 936 , lir_mul_strictfp 937 , lir_div 938 , lir_div_strictfp 939 , lir_rem 940 , lir_sqrt 941 , lir_abs 942 , lir_tan 943 , lir_log10 944 , lir_logic_and 945 , lir_logic_or 946 , lir_logic_xor 947 , lir_shl 948 , lir_shr 949 , lir_ushr 950 , lir_alloc_array 951 , lir_throw 952 , lir_compare_to 953 , lir_xadd 954 , lir_xchg 955 , end_op2 956 , begin_op3 957 , lir_idiv 958 , lir_irem 959 , lir_fmad 960 , lir_fmaf 961 , end_op3 962 , begin_opJavaCall 963 , lir_static_call 964 , lir_optvirtual_call 965 , lir_icvirtual_call 966 , lir_virtual_call 967 , lir_dynamic_call 968 , end_opJavaCall 969 , begin_opArrayCopy 970 , lir_arraycopy 971 , end_opArrayCopy 972 , begin_opUpdateCRC32 973 , lir_updatecrc32 974 , end_opUpdateCRC32 975 , begin_opLock 976 , lir_lock 977 , lir_unlock 978 , end_opLock 979 , begin_delay_slot 980 , lir_delay_slot 981 , end_delay_slot 982 , begin_opTypeCheck 983 , lir_instanceof 984 , lir_checkcast 985 , lir_store_check 986 , end_opTypeCheck 987 , begin_opCompareAndSwap 988 , lir_cas_long 989 , lir_cas_obj 990 , lir_cas_int 991 , end_opCompareAndSwap 992 , begin_opMDOProfile 993 , lir_profile_call 994 , lir_profile_type 995 , end_opMDOProfile 996 , begin_opAssert 997 , lir_assert 998 , end_opAssert 999 }; 1000 1001 1002 enum LIR_Condition { 1003 lir_cond_equal 1004 , lir_cond_notEqual 1005 , lir_cond_less 1006 , lir_cond_lessEqual 1007 , lir_cond_greaterEqual 1008 , lir_cond_greater 1009 , lir_cond_belowEqual 1010 , lir_cond_aboveEqual 1011 , lir_cond_always 1012 , lir_cond_unknown = -1 1013 }; 1014 1015 1016 enum LIR_PatchCode { 1017 lir_patch_none, 1018 lir_patch_low, 1019 lir_patch_high, 1020 lir_patch_normal 1021 }; 1022 1023 1024 enum LIR_MoveKind { 1025 lir_move_normal, 1026 lir_move_volatile, 1027 lir_move_unaligned, 1028 lir_move_wide, 1029 lir_move_max_flag 1030 }; 1031 1032 1033 // -------------------------------------------------- 1034 // LIR_Op 1035 // -------------------------------------------------- 1036 class LIR_Op: public CompilationResourceObj { 1037 friend class LIR_OpVisitState; 1038 1039 #ifdef ASSERT 1040 private: 1041 const char * _file; 1042 int _line; 1043 #endif 1044 1045 protected: 1046 LIR_Opr _result; 1047 unsigned short _code; 1048 unsigned short _flags; 1049 CodeEmitInfo* _info; 1050 int _id; // value id for register allocation 1051 int _fpu_pop_count; 1052 Instruction* _source; // for debugging 1053 1054 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN; 1055 1056 protected: 1057 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; } 1058 1059 public: 1060 LIR_Op() 1061 : 1062 #ifdef ASSERT 1063 _file(NULL) 1064 , _line(0), 1065 #endif 1066 _result(LIR_OprFact::illegalOpr) 1067 , _code(lir_none) 1068 , _flags(0) 1069 , _info(NULL) 1070 , _id(-1) 1071 , _fpu_pop_count(0) 1072 , _source(NULL) {} 1073 1074 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info) 1075 : 1076 #ifdef ASSERT 1077 _file(NULL) 1078 , _line(0), 1079 #endif 1080 _result(result) 1081 , _code(code) 1082 , _flags(0) 1083 , _info(info) 1084 , _id(-1) 1085 , _fpu_pop_count(0) 1086 , _source(NULL) {} 1087 1088 CodeEmitInfo* info() const { return _info; } 1089 LIR_Code code() const { return (LIR_Code)_code; } 1090 LIR_Opr result_opr() const { return _result; } 1091 void set_result_opr(LIR_Opr opr) { _result = opr; } 1092 1093 #ifdef ASSERT 1094 void set_file_and_line(const char * file, int line) { 1095 _file = file; 1096 _line = line; 1097 } 1098 #endif 1099 1100 virtual const char * name() const PRODUCT_RETURN0; 1101 virtual void visit(LIR_OpVisitState* state); 1102 1103 int id() const { return _id; } 1104 void set_id(int id) { _id = id; } 1105 1106 // FPU stack simulation helpers -- only used on Intel 1107 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; } 1108 int fpu_pop_count() const { return _fpu_pop_count; } 1109 bool pop_fpu_stack() { return _fpu_pop_count > 0; } 1110 1111 Instruction* source() const { return _source; } 1112 void set_source(Instruction* ins) { _source = ins; } 1113 1114 virtual void emit_code(LIR_Assembler* masm) = 0; 1115 virtual void print_instr(outputStream* out) const = 0; 1116 virtual void print_on(outputStream* st) const PRODUCT_RETURN; 1117 1118 virtual bool is_patching() { return false; } 1119 virtual LIR_OpCall* as_OpCall() { return NULL; } 1120 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; } 1121 virtual LIR_OpLabel* as_OpLabel() { return NULL; } 1122 virtual LIR_OpDelay* as_OpDelay() { return NULL; } 1123 virtual LIR_OpLock* as_OpLock() { return NULL; } 1124 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; } 1125 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; } 1126 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; } 1127 virtual LIR_OpBranch* as_OpBranch() { return NULL; } 1128 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; } 1129 virtual LIR_OpConvert* as_OpConvert() { return NULL; } 1130 virtual LIR_Op0* as_Op0() { return NULL; } 1131 virtual LIR_Op1* as_Op1() { return NULL; } 1132 virtual LIR_Op2* as_Op2() { return NULL; } 1133 virtual LIR_Op3* as_Op3() { return NULL; } 1134 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; } 1135 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return NULL; } 1136 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; } 1137 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; } 1138 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; } 1139 virtual LIR_OpProfileType* as_OpProfileType() { return NULL; } 1140 #ifdef ASSERT 1141 virtual LIR_OpAssert* as_OpAssert() { return NULL; } 1142 #endif 1143 1144 virtual void verify() const {} 1145 }; 1146 1147 // for calls 1148 class LIR_OpCall: public LIR_Op { 1149 friend class LIR_OpVisitState; 1150 1151 protected: 1152 address _addr; 1153 LIR_OprList* _arguments; 1154 protected: 1155 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result, 1156 LIR_OprList* arguments, CodeEmitInfo* info = NULL) 1157 : LIR_Op(code, result, info) 1158 , _addr(addr) 1159 , _arguments(arguments) {} 1160 1161 public: 1162 address addr() const { return _addr; } 1163 const LIR_OprList* arguments() const { return _arguments; } 1164 virtual LIR_OpCall* as_OpCall() { return this; } 1165 }; 1166 1167 1168 // -------------------------------------------------- 1169 // LIR_OpJavaCall 1170 // -------------------------------------------------- 1171 class LIR_OpJavaCall: public LIR_OpCall { 1172 friend class LIR_OpVisitState; 1173 1174 private: 1175 ciMethod* _method; 1176 LIR_Opr _receiver; 1177 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr. 1178 1179 public: 1180 LIR_OpJavaCall(LIR_Code code, ciMethod* method, 1181 LIR_Opr receiver, LIR_Opr result, 1182 address addr, LIR_OprList* arguments, 1183 CodeEmitInfo* info) 1184 : LIR_OpCall(code, addr, result, arguments, info) 1185 , _method(method) 1186 , _receiver(receiver) 1187 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) 1188 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } 1189 1190 LIR_OpJavaCall(LIR_Code code, ciMethod* method, 1191 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset, 1192 LIR_OprList* arguments, CodeEmitInfo* info) 1193 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info) 1194 , _method(method) 1195 , _receiver(receiver) 1196 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr) 1197 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); } 1198 1199 LIR_Opr receiver() const { return _receiver; } 1200 ciMethod* method() const { return _method; } 1201 1202 // JSR 292 support. 1203 bool is_invokedynamic() const { return code() == lir_dynamic_call; } 1204 bool is_method_handle_invoke() const { 1205 return method()->is_compiled_lambda_form() || // Java-generated lambda form 1206 method()->is_method_handle_intrinsic(); // JVM-generated MH intrinsic 1207 } 1208 1209 intptr_t vtable_offset() const { 1210 assert(_code == lir_virtual_call, "only have vtable for real vcall"); 1211 return (intptr_t) addr(); 1212 } 1213 1214 virtual void emit_code(LIR_Assembler* masm); 1215 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; } 1216 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1217 }; 1218 1219 // -------------------------------------------------- 1220 // LIR_OpLabel 1221 // -------------------------------------------------- 1222 // Location where a branch can continue 1223 class LIR_OpLabel: public LIR_Op { 1224 friend class LIR_OpVisitState; 1225 1226 private: 1227 Label* _label; 1228 public: 1229 LIR_OpLabel(Label* lbl) 1230 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL) 1231 , _label(lbl) {} 1232 Label* label() const { return _label; } 1233 1234 virtual void emit_code(LIR_Assembler* masm); 1235 virtual LIR_OpLabel* as_OpLabel() { return this; } 1236 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1237 }; 1238 1239 // LIR_OpArrayCopy 1240 class LIR_OpArrayCopy: public LIR_Op { 1241 friend class LIR_OpVisitState; 1242 1243 private: 1244 ArrayCopyStub* _stub; 1245 LIR_Opr _src; 1246 LIR_Opr _src_pos; 1247 LIR_Opr _dst; 1248 LIR_Opr _dst_pos; 1249 LIR_Opr _length; 1250 LIR_Opr _tmp; 1251 ciArrayKlass* _expected_type; 1252 int _flags; 1253 1254 public: 1255 enum Flags { 1256 src_null_check = 1 << 0, 1257 dst_null_check = 1 << 1, 1258 src_pos_positive_check = 1 << 2, 1259 dst_pos_positive_check = 1 << 3, 1260 length_positive_check = 1 << 4, 1261 src_range_check = 1 << 5, 1262 dst_range_check = 1 << 6, 1263 type_check = 1 << 7, 1264 overlapping = 1 << 8, 1265 unaligned = 1 << 9, 1266 src_objarray = 1 << 10, 1267 dst_objarray = 1 << 11, 1268 all_flags = (1 << 12) - 1 1269 }; 1270 1271 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, 1272 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info); 1273 1274 LIR_Opr src() const { return _src; } 1275 LIR_Opr src_pos() const { return _src_pos; } 1276 LIR_Opr dst() const { return _dst; } 1277 LIR_Opr dst_pos() const { return _dst_pos; } 1278 LIR_Opr length() const { return _length; } 1279 LIR_Opr tmp() const { return _tmp; } 1280 int flags() const { return _flags; } 1281 ciArrayKlass* expected_type() const { return _expected_type; } 1282 ArrayCopyStub* stub() const { return _stub; } 1283 1284 virtual void emit_code(LIR_Assembler* masm); 1285 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; } 1286 void print_instr(outputStream* out) const PRODUCT_RETURN; 1287 }; 1288 1289 // LIR_OpUpdateCRC32 1290 class LIR_OpUpdateCRC32: public LIR_Op { 1291 friend class LIR_OpVisitState; 1292 1293 private: 1294 LIR_Opr _crc; 1295 LIR_Opr _val; 1296 1297 public: 1298 1299 LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res); 1300 1301 LIR_Opr crc() const { return _crc; } 1302 LIR_Opr val() const { return _val; } 1303 1304 virtual void emit_code(LIR_Assembler* masm); 1305 virtual LIR_OpUpdateCRC32* as_OpUpdateCRC32() { return this; } 1306 void print_instr(outputStream* out) const PRODUCT_RETURN; 1307 }; 1308 1309 // -------------------------------------------------- 1310 // LIR_Op0 1311 // -------------------------------------------------- 1312 class LIR_Op0: public LIR_Op { 1313 friend class LIR_OpVisitState; 1314 1315 public: 1316 LIR_Op0(LIR_Code code) 1317 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } 1318 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL) 1319 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); } 1320 1321 virtual void emit_code(LIR_Assembler* masm); 1322 virtual LIR_Op0* as_Op0() { return this; } 1323 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1324 }; 1325 1326 1327 // -------------------------------------------------- 1328 // LIR_Op1 1329 // -------------------------------------------------- 1330 1331 class LIR_Op1: public LIR_Op { 1332 friend class LIR_OpVisitState; 1333 1334 protected: 1335 LIR_Opr _opr; // input operand 1336 BasicType _type; // Operand types 1337 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?) 1338 1339 static void print_patch_code(outputStream* out, LIR_PatchCode code); 1340 1341 void set_kind(LIR_MoveKind kind) { 1342 assert(code() == lir_move, "must be"); 1343 _flags = kind; 1344 } 1345 1346 public: 1347 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL) 1348 : LIR_Op(code, result, info) 1349 , _opr(opr) 1350 , _type(type) 1351 , _patch(patch) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } 1352 1353 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind) 1354 : LIR_Op(code, result, info) 1355 , _opr(opr) 1356 , _type(type) 1357 , _patch(patch) { 1358 assert(code == lir_move, "must be"); 1359 set_kind(kind); 1360 } 1361 1362 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info) 1363 : LIR_Op(code, LIR_OprFact::illegalOpr, info) 1364 , _opr(opr) 1365 , _type(T_ILLEGAL) 1366 , _patch(lir_patch_none) { assert(is_in_range(code, begin_op1, end_op1), "code check"); } 1367 1368 LIR_Opr in_opr() const { return _opr; } 1369 LIR_PatchCode patch_code() const { return _patch; } 1370 BasicType type() const { return _type; } 1371 1372 LIR_MoveKind move_kind() const { 1373 assert(code() == lir_move, "must be"); 1374 return (LIR_MoveKind)_flags; 1375 } 1376 1377 virtual bool is_patching() { return _patch != lir_patch_none; } 1378 virtual void emit_code(LIR_Assembler* masm); 1379 virtual LIR_Op1* as_Op1() { return this; } 1380 virtual const char * name() const PRODUCT_RETURN0; 1381 1382 void set_in_opr(LIR_Opr opr) { _opr = opr; } 1383 1384 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1385 virtual void verify() const; 1386 }; 1387 1388 1389 // for runtime calls 1390 class LIR_OpRTCall: public LIR_OpCall { 1391 friend class LIR_OpVisitState; 1392 1393 private: 1394 LIR_Opr _tmp; 1395 public: 1396 LIR_OpRTCall(address addr, LIR_Opr tmp, 1397 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL) 1398 : LIR_OpCall(lir_rtcall, addr, result, arguments, info) 1399 , _tmp(tmp) {} 1400 1401 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1402 virtual void emit_code(LIR_Assembler* masm); 1403 virtual LIR_OpRTCall* as_OpRTCall() { return this; } 1404 1405 LIR_Opr tmp() const { return _tmp; } 1406 1407 virtual void verify() const; 1408 }; 1409 1410 1411 class LIR_OpBranch: public LIR_Op { 1412 friend class LIR_OpVisitState; 1413 1414 private: 1415 LIR_Condition _cond; 1416 BasicType _type; 1417 Label* _label; 1418 BlockBegin* _block; // if this is a branch to a block, this is the block 1419 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block 1420 CodeStub* _stub; // if this is a branch to a stub, this is the stub 1421 1422 public: 1423 LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl) 1424 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL) 1425 , _cond(cond) 1426 , _type(type) 1427 , _label(lbl) 1428 , _block(NULL) 1429 , _ublock(NULL) 1430 , _stub(NULL) { } 1431 1432 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block); 1433 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub); 1434 1435 // for unordered comparisons 1436 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock); 1437 1438 LIR_Condition cond() const { return _cond; } 1439 BasicType type() const { return _type; } 1440 Label* label() const { return _label; } 1441 BlockBegin* block() const { return _block; } 1442 BlockBegin* ublock() const { return _ublock; } 1443 CodeStub* stub() const { return _stub; } 1444 1445 void change_block(BlockBegin* b); 1446 void change_ublock(BlockBegin* b); 1447 void negate_cond(); 1448 1449 virtual void emit_code(LIR_Assembler* masm); 1450 virtual LIR_OpBranch* as_OpBranch() { return this; } 1451 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1452 }; 1453 1454 1455 class ConversionStub; 1456 1457 class LIR_OpConvert: public LIR_Op1 { 1458 friend class LIR_OpVisitState; 1459 1460 private: 1461 Bytecodes::Code _bytecode; 1462 ConversionStub* _stub; 1463 1464 public: 1465 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub) 1466 : LIR_Op1(lir_convert, opr, result) 1467 , _bytecode(code) 1468 , _stub(stub) {} 1469 1470 Bytecodes::Code bytecode() const { return _bytecode; } 1471 ConversionStub* stub() const { return _stub; } 1472 1473 virtual void emit_code(LIR_Assembler* masm); 1474 virtual LIR_OpConvert* as_OpConvert() { return this; } 1475 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1476 1477 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN; 1478 }; 1479 1480 1481 // LIR_OpAllocObj 1482 class LIR_OpAllocObj : public LIR_Op1 { 1483 friend class LIR_OpVisitState; 1484 1485 private: 1486 LIR_Opr _tmp1; 1487 LIR_Opr _tmp2; 1488 LIR_Opr _tmp3; 1489 LIR_Opr _tmp4; 1490 int _hdr_size; 1491 int _obj_size; 1492 CodeStub* _stub; 1493 bool _init_check; 1494 1495 public: 1496 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result, 1497 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, 1498 int hdr_size, int obj_size, bool init_check, CodeStub* stub) 1499 : LIR_Op1(lir_alloc_object, klass, result) 1500 , _tmp1(t1) 1501 , _tmp2(t2) 1502 , _tmp3(t3) 1503 , _tmp4(t4) 1504 , _hdr_size(hdr_size) 1505 , _obj_size(obj_size) 1506 , _stub(stub) 1507 , _init_check(init_check) { } 1508 1509 LIR_Opr klass() const { return in_opr(); } 1510 LIR_Opr obj() const { return result_opr(); } 1511 LIR_Opr tmp1() const { return _tmp1; } 1512 LIR_Opr tmp2() const { return _tmp2; } 1513 LIR_Opr tmp3() const { return _tmp3; } 1514 LIR_Opr tmp4() const { return _tmp4; } 1515 int header_size() const { return _hdr_size; } 1516 int object_size() const { return _obj_size; } 1517 bool init_check() const { return _init_check; } 1518 CodeStub* stub() const { return _stub; } 1519 1520 virtual void emit_code(LIR_Assembler* masm); 1521 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; } 1522 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1523 }; 1524 1525 1526 // LIR_OpRoundFP 1527 class LIR_OpRoundFP : public LIR_Op1 { 1528 friend class LIR_OpVisitState; 1529 1530 private: 1531 LIR_Opr _tmp; 1532 1533 public: 1534 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) 1535 : LIR_Op1(lir_roundfp, reg, result) 1536 , _tmp(stack_loc_temp) {} 1537 1538 LIR_Opr tmp() const { return _tmp; } 1539 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; } 1540 void print_instr(outputStream* out) const PRODUCT_RETURN; 1541 }; 1542 1543 // LIR_OpTypeCheck 1544 class LIR_OpTypeCheck: public LIR_Op { 1545 friend class LIR_OpVisitState; 1546 1547 private: 1548 LIR_Opr _object; 1549 LIR_Opr _array; 1550 ciKlass* _klass; 1551 LIR_Opr _tmp1; 1552 LIR_Opr _tmp2; 1553 LIR_Opr _tmp3; 1554 bool _fast_check; 1555 CodeEmitInfo* _info_for_patch; 1556 CodeEmitInfo* _info_for_exception; 1557 CodeStub* _stub; 1558 ciMethod* _profiled_method; 1559 int _profiled_bci; 1560 bool _should_profile; 1561 1562 public: 1563 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, 1564 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 1565 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub); 1566 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, 1567 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception); 1568 1569 LIR_Opr object() const { return _object; } 1570 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; } 1571 LIR_Opr tmp1() const { return _tmp1; } 1572 LIR_Opr tmp2() const { return _tmp2; } 1573 LIR_Opr tmp3() const { return _tmp3; } 1574 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; } 1575 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; } 1576 CodeEmitInfo* info_for_patch() const { return _info_for_patch; } 1577 CodeEmitInfo* info_for_exception() const { return _info_for_exception; } 1578 CodeStub* stub() const { return _stub; } 1579 1580 // MethodData* profiling 1581 void set_profiled_method(ciMethod *method) { _profiled_method = method; } 1582 void set_profiled_bci(int bci) { _profiled_bci = bci; } 1583 void set_should_profile(bool b) { _should_profile = b; } 1584 ciMethod* profiled_method() const { return _profiled_method; } 1585 int profiled_bci() const { return _profiled_bci; } 1586 bool should_profile() const { return _should_profile; } 1587 1588 virtual bool is_patching() { return _info_for_patch != NULL; } 1589 virtual void emit_code(LIR_Assembler* masm); 1590 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; } 1591 void print_instr(outputStream* out) const PRODUCT_RETURN; 1592 }; 1593 1594 // LIR_Op2 1595 class LIR_Op2: public LIR_Op { 1596 friend class LIR_OpVisitState; 1597 1598 int _fpu_stack_size; // for sin/cos implementation on Intel 1599 1600 protected: 1601 LIR_Opr _opr1; 1602 LIR_Opr _opr2; 1603 BasicType _type; 1604 LIR_Opr _tmp1; 1605 LIR_Opr _tmp2; 1606 LIR_Opr _tmp3; 1607 LIR_Opr _tmp4; 1608 LIR_Opr _tmp5; 1609 LIR_Condition _condition; 1610 1611 void verify() const; 1612 1613 public: 1614 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL) 1615 : LIR_Op(code, LIR_OprFact::illegalOpr, info) 1616 , _fpu_stack_size(0) 1617 , _opr1(opr1) 1618 , _opr2(opr2) 1619 , _type(T_ILLEGAL) 1620 , _tmp1(LIR_OprFact::illegalOpr) 1621 , _tmp2(LIR_OprFact::illegalOpr) 1622 , _tmp3(LIR_OprFact::illegalOpr) 1623 , _tmp4(LIR_OprFact::illegalOpr) 1624 , _tmp5(LIR_OprFact::illegalOpr) 1625 , _condition(condition) { 1626 assert(code == lir_cmp || code == lir_assert, "code check"); 1627 } 1628 1629 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type) 1630 : LIR_Op(code, result, NULL) 1631 , _fpu_stack_size(0) 1632 , _opr1(opr1) 1633 , _opr2(opr2) 1634 , _type(type) 1635 , _tmp1(LIR_OprFact::illegalOpr) 1636 , _tmp2(LIR_OprFact::illegalOpr) 1637 , _tmp3(LIR_OprFact::illegalOpr) 1638 , _tmp4(LIR_OprFact::illegalOpr) 1639 , _tmp5(LIR_OprFact::illegalOpr) 1640 , _condition(condition) { 1641 assert(code == lir_cmove, "code check"); 1642 assert(type != T_ILLEGAL, "cmove should have type"); 1643 } 1644 1645 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr, 1646 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL) 1647 : LIR_Op(code, result, info) 1648 , _fpu_stack_size(0) 1649 , _opr1(opr1) 1650 , _opr2(opr2) 1651 , _type(type) 1652 , _tmp1(LIR_OprFact::illegalOpr) 1653 , _tmp2(LIR_OprFact::illegalOpr) 1654 , _tmp3(LIR_OprFact::illegalOpr) 1655 , _tmp4(LIR_OprFact::illegalOpr) 1656 , _tmp5(LIR_OprFact::illegalOpr) 1657 , _condition(lir_cond_unknown) { 1658 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); 1659 } 1660 1661 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp1, LIR_Opr tmp2 = LIR_OprFact::illegalOpr, 1662 LIR_Opr tmp3 = LIR_OprFact::illegalOpr, LIR_Opr tmp4 = LIR_OprFact::illegalOpr, LIR_Opr tmp5 = LIR_OprFact::illegalOpr) 1663 : LIR_Op(code, result, NULL) 1664 , _fpu_stack_size(0) 1665 , _opr1(opr1) 1666 , _opr2(opr2) 1667 , _type(T_ILLEGAL) 1668 , _tmp1(tmp1) 1669 , _tmp2(tmp2) 1670 , _tmp3(tmp3) 1671 , _tmp4(tmp4) 1672 , _tmp5(tmp5) 1673 , _condition(lir_cond_unknown) { 1674 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check"); 1675 } 1676 1677 LIR_Opr in_opr1() const { return _opr1; } 1678 LIR_Opr in_opr2() const { return _opr2; } 1679 BasicType type() const { return _type; } 1680 LIR_Opr tmp1_opr() const { return _tmp1; } 1681 LIR_Opr tmp2_opr() const { return _tmp2; } 1682 LIR_Opr tmp3_opr() const { return _tmp3; } 1683 LIR_Opr tmp4_opr() const { return _tmp4; } 1684 LIR_Opr tmp5_opr() const { return _tmp5; } 1685 LIR_Condition condition() const { 1686 assert(code() == lir_cmp || code() == lir_cmove || code() == lir_assert, "only valid for cmp and cmove and assert"); return _condition; 1687 } 1688 void set_condition(LIR_Condition condition) { 1689 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition; 1690 } 1691 1692 void set_fpu_stack_size(int size) { _fpu_stack_size = size; } 1693 int fpu_stack_size() const { return _fpu_stack_size; } 1694 1695 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; } 1696 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; } 1697 1698 virtual void emit_code(LIR_Assembler* masm); 1699 virtual LIR_Op2* as_Op2() { return this; } 1700 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1701 }; 1702 1703 class LIR_OpAllocArray : public LIR_Op { 1704 friend class LIR_OpVisitState; 1705 1706 private: 1707 LIR_Opr _klass; 1708 LIR_Opr _len; 1709 LIR_Opr _tmp1; 1710 LIR_Opr _tmp2; 1711 LIR_Opr _tmp3; 1712 LIR_Opr _tmp4; 1713 BasicType _type; 1714 CodeStub* _stub; 1715 1716 public: 1717 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub) 1718 : LIR_Op(lir_alloc_array, result, NULL) 1719 , _klass(klass) 1720 , _len(len) 1721 , _tmp1(t1) 1722 , _tmp2(t2) 1723 , _tmp3(t3) 1724 , _tmp4(t4) 1725 , _type(type) 1726 , _stub(stub) {} 1727 1728 LIR_Opr klass() const { return _klass; } 1729 LIR_Opr len() const { return _len; } 1730 LIR_Opr obj() const { return result_opr(); } 1731 LIR_Opr tmp1() const { return _tmp1; } 1732 LIR_Opr tmp2() const { return _tmp2; } 1733 LIR_Opr tmp3() const { return _tmp3; } 1734 LIR_Opr tmp4() const { return _tmp4; } 1735 BasicType type() const { return _type; } 1736 CodeStub* stub() const { return _stub; } 1737 1738 virtual void emit_code(LIR_Assembler* masm); 1739 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; } 1740 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1741 }; 1742 1743 1744 class LIR_Op3: public LIR_Op { 1745 friend class LIR_OpVisitState; 1746 1747 private: 1748 LIR_Opr _opr1; 1749 LIR_Opr _opr2; 1750 LIR_Opr _opr3; 1751 public: 1752 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL) 1753 : LIR_Op(code, result, info) 1754 , _opr1(opr1) 1755 , _opr2(opr2) 1756 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); } 1757 LIR_Opr in_opr1() const { return _opr1; } 1758 LIR_Opr in_opr2() const { return _opr2; } 1759 LIR_Opr in_opr3() const { return _opr3; } 1760 1761 virtual void emit_code(LIR_Assembler* masm); 1762 virtual LIR_Op3* as_Op3() { return this; } 1763 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1764 }; 1765 1766 1767 //-------------------------------- 1768 class LabelObj: public CompilationResourceObj { 1769 private: 1770 Label _label; 1771 public: 1772 LabelObj() {} 1773 Label* label() { return &_label; } 1774 }; 1775 1776 1777 class LIR_OpLock: public LIR_Op { 1778 friend class LIR_OpVisitState; 1779 1780 private: 1781 LIR_Opr _hdr; 1782 LIR_Opr _obj; 1783 LIR_Opr _lock; 1784 LIR_Opr _scratch; 1785 CodeStub* _stub; 1786 public: 1787 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) 1788 : LIR_Op(code, LIR_OprFact::illegalOpr, info) 1789 , _hdr(hdr) 1790 , _obj(obj) 1791 , _lock(lock) 1792 , _scratch(scratch) 1793 , _stub(stub) {} 1794 1795 LIR_Opr hdr_opr() const { return _hdr; } 1796 LIR_Opr obj_opr() const { return _obj; } 1797 LIR_Opr lock_opr() const { return _lock; } 1798 LIR_Opr scratch_opr() const { return _scratch; } 1799 CodeStub* stub() const { return _stub; } 1800 1801 virtual void emit_code(LIR_Assembler* masm); 1802 virtual LIR_OpLock* as_OpLock() { return this; } 1803 void print_instr(outputStream* out) const PRODUCT_RETURN; 1804 }; 1805 1806 1807 class LIR_OpDelay: public LIR_Op { 1808 friend class LIR_OpVisitState; 1809 1810 private: 1811 LIR_Op* _op; 1812 1813 public: 1814 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info): 1815 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info), 1816 _op(op) { 1817 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops"); 1818 } 1819 virtual void emit_code(LIR_Assembler* masm); 1820 virtual LIR_OpDelay* as_OpDelay() { return this; } 1821 void print_instr(outputStream* out) const PRODUCT_RETURN; 1822 LIR_Op* delay_op() const { return _op; } 1823 CodeEmitInfo* call_info() const { return info(); } 1824 }; 1825 1826 #ifdef ASSERT 1827 // LIR_OpAssert 1828 class LIR_OpAssert : public LIR_Op2 { 1829 friend class LIR_OpVisitState; 1830 1831 private: 1832 const char* _msg; 1833 bool _halt; 1834 1835 public: 1836 LIR_OpAssert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) 1837 : LIR_Op2(lir_assert, condition, opr1, opr2) 1838 , _msg(msg) 1839 , _halt(halt) { 1840 } 1841 1842 const char* msg() const { return _msg; } 1843 bool halt() const { return _halt; } 1844 1845 virtual void emit_code(LIR_Assembler* masm); 1846 virtual LIR_OpAssert* as_OpAssert() { return this; } 1847 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1848 }; 1849 #endif 1850 1851 // LIR_OpCompareAndSwap 1852 class LIR_OpCompareAndSwap : public LIR_Op { 1853 friend class LIR_OpVisitState; 1854 1855 private: 1856 LIR_Opr _addr; 1857 LIR_Opr _cmp_value; 1858 LIR_Opr _new_value; 1859 LIR_Opr _tmp1; 1860 LIR_Opr _tmp2; 1861 1862 public: 1863 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1864 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) 1865 : LIR_Op(code, result, NULL) // no result, no info 1866 , _addr(addr) 1867 , _cmp_value(cmp_value) 1868 , _new_value(new_value) 1869 , _tmp1(t1) 1870 , _tmp2(t2) { } 1871 1872 LIR_Opr addr() const { return _addr; } 1873 LIR_Opr cmp_value() const { return _cmp_value; } 1874 LIR_Opr new_value() const { return _new_value; } 1875 LIR_Opr tmp1() const { return _tmp1; } 1876 LIR_Opr tmp2() const { return _tmp2; } 1877 1878 virtual void emit_code(LIR_Assembler* masm); 1879 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; } 1880 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1881 }; 1882 1883 // LIR_OpProfileCall 1884 class LIR_OpProfileCall : public LIR_Op { 1885 friend class LIR_OpVisitState; 1886 1887 private: 1888 ciMethod* _profiled_method; 1889 int _profiled_bci; 1890 ciMethod* _profiled_callee; 1891 LIR_Opr _mdo; 1892 LIR_Opr _recv; 1893 LIR_Opr _tmp1; 1894 ciKlass* _known_holder; 1895 1896 public: 1897 // Destroys recv 1898 LIR_OpProfileCall(ciMethod* profiled_method, int profiled_bci, ciMethod* profiled_callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder) 1899 : LIR_Op(lir_profile_call, LIR_OprFact::illegalOpr, NULL) // no result, no info 1900 , _profiled_method(profiled_method) 1901 , _profiled_bci(profiled_bci) 1902 , _profiled_callee(profiled_callee) 1903 , _mdo(mdo) 1904 , _recv(recv) 1905 , _tmp1(t1) 1906 , _known_holder(known_holder) { } 1907 1908 ciMethod* profiled_method() const { return _profiled_method; } 1909 int profiled_bci() const { return _profiled_bci; } 1910 ciMethod* profiled_callee() const { return _profiled_callee; } 1911 LIR_Opr mdo() const { return _mdo; } 1912 LIR_Opr recv() const { return _recv; } 1913 LIR_Opr tmp1() const { return _tmp1; } 1914 ciKlass* known_holder() const { return _known_holder; } 1915 1916 virtual void emit_code(LIR_Assembler* masm); 1917 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; } 1918 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1919 bool should_profile_receiver_type() const { 1920 bool callee_is_static = _profiled_callee->is_loaded() && _profiled_callee->is_static(); 1921 Bytecodes::Code bc = _profiled_method->java_code_at_bci(_profiled_bci); 1922 bool call_is_virtual = (bc == Bytecodes::_invokevirtual && !_profiled_callee->can_be_statically_bound()) || bc == Bytecodes::_invokeinterface; 1923 return C1ProfileVirtualCalls && call_is_virtual && !callee_is_static; 1924 } 1925 }; 1926 1927 // LIR_OpProfileType 1928 class LIR_OpProfileType : public LIR_Op { 1929 friend class LIR_OpVisitState; 1930 1931 private: 1932 LIR_Opr _mdp; 1933 LIR_Opr _obj; 1934 LIR_Opr _tmp; 1935 ciKlass* _exact_klass; // non NULL if we know the klass statically (no need to load it from _obj) 1936 intptr_t _current_klass; // what the profiling currently reports 1937 bool _not_null; // true if we know statically that _obj cannot be null 1938 bool _no_conflict; // true if we're profling parameters, _exact_klass is not NULL and we know 1939 // _exact_klass it the only possible type for this parameter in any context. 1940 1941 public: 1942 // Destroys recv 1943 LIR_OpProfileType(LIR_Opr mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) 1944 : LIR_Op(lir_profile_type, LIR_OprFact::illegalOpr, NULL) // no result, no info 1945 , _mdp(mdp) 1946 , _obj(obj) 1947 , _tmp(tmp) 1948 , _exact_klass(exact_klass) 1949 , _current_klass(current_klass) 1950 , _not_null(not_null) 1951 , _no_conflict(no_conflict) { } 1952 1953 LIR_Opr mdp() const { return _mdp; } 1954 LIR_Opr obj() const { return _obj; } 1955 LIR_Opr tmp() const { return _tmp; } 1956 ciKlass* exact_klass() const { return _exact_klass; } 1957 intptr_t current_klass() const { return _current_klass; } 1958 bool not_null() const { return _not_null; } 1959 bool no_conflict() const { return _no_conflict; } 1960 1961 virtual void emit_code(LIR_Assembler* masm); 1962 virtual LIR_OpProfileType* as_OpProfileType() { return this; } 1963 virtual void print_instr(outputStream* out) const PRODUCT_RETURN; 1964 }; 1965 1966 class LIR_InsertionBuffer; 1967 1968 //--------------------------------LIR_List--------------------------------------------------- 1969 // Maintains a list of LIR instructions (one instance of LIR_List per basic block) 1970 // The LIR instructions are appended by the LIR_List class itself; 1971 // 1972 // Notes: 1973 // - all offsets are(should be) in bytes 1974 // - local positions are specified with an offset, with offset 0 being local 0 1975 1976 class LIR_List: public CompilationResourceObj { 1977 private: 1978 LIR_OpList _operations; 1979 1980 Compilation* _compilation; 1981 #ifndef PRODUCT 1982 BlockBegin* _block; 1983 #endif 1984 #ifdef ASSERT 1985 const char * _file; 1986 int _line; 1987 #endif 1988 1989 public: 1990 void append(LIR_Op* op) { 1991 if (op->source() == NULL) 1992 op->set_source(_compilation->current_instruction()); 1993 #ifndef PRODUCT 1994 if (PrintIRWithLIR) { 1995 _compilation->maybe_print_current_instruction(); 1996 op->print(); tty->cr(); 1997 } 1998 #endif // PRODUCT 1999 2000 _operations.append(op); 2001 2002 #ifdef ASSERT 2003 op->verify(); 2004 op->set_file_and_line(_file, _line); 2005 _file = NULL; 2006 _line = 0; 2007 #endif 2008 } 2009 2010 LIR_List(Compilation* compilation, BlockBegin* block = NULL); 2011 2012 #ifdef ASSERT 2013 void set_file_and_line(const char * file, int line); 2014 #endif 2015 2016 //---------- accessors --------------- 2017 LIR_OpList* instructions_list() { return &_operations; } 2018 int length() const { return _operations.length(); } 2019 LIR_Op* at(int i) const { return _operations.at(i); } 2020 2021 NOT_PRODUCT(BlockBegin* block() const { return _block; }); 2022 2023 // insert LIR_Ops in buffer to right places in LIR_List 2024 void append(LIR_InsertionBuffer* buffer); 2025 2026 //---------- mutators --------------- 2027 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); } 2028 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); } 2029 void remove_at(int i) { _operations.remove_at(i); } 2030 2031 //---------- printing ------------- 2032 void print_instructions() PRODUCT_RETURN; 2033 2034 2035 //---------- instructions ------------- 2036 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 2037 address dest, LIR_OprList* arguments, 2038 CodeEmitInfo* info) { 2039 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info)); 2040 } 2041 void call_static(ciMethod* method, LIR_Opr result, 2042 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { 2043 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info)); 2044 } 2045 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 2046 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { 2047 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info)); 2048 } 2049 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 2050 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) { 2051 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info)); 2052 } 2053 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result, 2054 address dest, LIR_OprList* arguments, CodeEmitInfo* info) { 2055 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info)); 2056 } 2057 2058 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); } 2059 void word_align() { append(new LIR_Op0(lir_word_align)); } 2060 void membar() { append(new LIR_Op0(lir_membar)); } 2061 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); } 2062 void membar_release() { append(new LIR_Op0(lir_membar_release)); } 2063 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); } 2064 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); } 2065 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); } 2066 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); } 2067 2068 void nop() { append(new LIR_Op0(lir_nop)); } 2069 void build_frame() { append(new LIR_Op0(lir_build_frame)); } 2070 2071 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); } 2072 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); } 2073 2074 void on_spin_wait() { append(new LIR_Op0(lir_on_spin_wait)); } 2075 2076 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); } 2077 2078 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); } 2079 void leal(LIR_Opr from, LIR_Opr result_reg, LIR_PatchCode patch_code = lir_patch_none, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_leal, from, result_reg, T_ILLEGAL, patch_code, info)); } 2080 2081 // result is a stack location for old backend and vreg for UseLinearScan 2082 // stack_loc_temp is an illegal register for old backend 2083 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); } 2084 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } 2085 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); } 2086 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); } 2087 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } 2088 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); } 2089 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); } 2090 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { 2091 if (UseCompressedOops) { 2092 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide)); 2093 } else { 2094 move(src, dst, info); 2095 } 2096 } 2097 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { 2098 if (UseCompressedOops) { 2099 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide)); 2100 } else { 2101 move(src, dst, info); 2102 } 2103 } 2104 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); } 2105 2106 void oop2reg (jobject o, LIR_Opr reg) { assert(reg->type() == T_OBJECT, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); } 2107 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info); 2108 2109 void metadata2reg (Metadata* o, LIR_Opr reg) { assert(reg->type() == T_METADATA, "bad reg"); append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg)); } 2110 void klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info); 2111 2112 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); } 2113 2114 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); } 2115 2116 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); } 2117 2118 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); } 2119 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); } 2120 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); } 2121 2122 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); } 2123 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); } 2124 2125 void null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null = false); 2126 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) { 2127 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info)); 2128 } 2129 void unwind_exception(LIR_Opr exceptionOop) { 2130 append(new LIR_Op1(lir_unwind, exceptionOop)); 2131 } 2132 2133 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { 2134 append(new LIR_Op2(lir_compare_to, left, right, dst)); 2135 } 2136 2137 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); } 2138 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); } 2139 2140 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) { 2141 append(new LIR_Op2(lir_cmp, condition, left, right, info)); 2142 } 2143 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) { 2144 cmp(condition, left, LIR_OprFact::intConst(right), info); 2145 } 2146 2147 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info); 2148 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info); 2149 2150 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) { 2151 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type)); 2152 } 2153 2154 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 2155 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 2156 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 2157 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 2158 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 2159 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr); 2160 2161 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); } 2162 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); } 2163 void fmad(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmad, from, from1, from2, to)); } 2164 void fmaf(LIR_Opr from, LIR_Opr from1, LIR_Opr from2, LIR_Opr to) { append(new LIR_Op3(lir_fmaf, from, from1, from2, to)); } 2165 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); } 2166 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); } 2167 2168 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); } 2169 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); } 2170 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); } 2171 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); } 2172 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); } 2173 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); } 2174 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); } 2175 2176 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2177 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); 2178 2179 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); 2180 2181 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2182 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2183 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none); 2184 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none); 2185 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code); 2186 2187 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2188 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2189 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2190 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info); 2191 2192 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub); 2193 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub); 2194 2195 // jump is an unconditional branch 2196 void jump(BlockBegin* block) { 2197 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block)); 2198 } 2199 void jump(CodeStub* stub) { 2200 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub)); 2201 } 2202 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); } 2203 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) { 2204 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); 2205 append(new LIR_OpBranch(cond, type, block)); 2206 } 2207 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) { 2208 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons"); 2209 append(new LIR_OpBranch(cond, type, stub)); 2210 } 2211 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) { 2212 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only"); 2213 append(new LIR_OpBranch(cond, type, block, unordered)); 2214 } 2215 2216 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2217 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2218 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp); 2219 2220 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } 2221 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } 2222 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); } 2223 2224 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); } 2225 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less); 2226 2227 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) { 2228 append(new LIR_OpRTCall(routine, tmp, result, arguments)); 2229 } 2230 2231 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result, 2232 LIR_OprList* arguments, CodeEmitInfo* info) { 2233 append(new LIR_OpRTCall(routine, tmp, result, arguments, info)); 2234 } 2235 2236 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); } 2237 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub); 2238 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info); 2239 2240 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); } 2241 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); } 2242 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); } 2243 2244 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); } 2245 2246 void update_crc32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) { append(new LIR_OpUpdateCRC32(crc, val, res)); } 2247 2248 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); } 2249 2250 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci); 2251 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci); 2252 2253 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, 2254 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 2255 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, 2256 ciMethod* profiled_method, int profiled_bci); 2257 // MethodData* profiling 2258 void profile_call(ciMethod* method, int bci, ciMethod* callee, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) { 2259 append(new LIR_OpProfileCall(method, bci, callee, mdo, recv, t1, cha_klass)); 2260 } 2261 void profile_type(LIR_Address* mdp, LIR_Opr obj, ciKlass* exact_klass, intptr_t current_klass, LIR_Opr tmp, bool not_null, bool no_conflict) { 2262 append(new LIR_OpProfileType(LIR_OprFact::address(mdp), obj, exact_klass, current_klass, tmp, not_null, no_conflict)); 2263 } 2264 2265 void xadd(LIR_Opr src, LIR_Opr add, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xadd, src, add, res, tmp)); } 2266 void xchg(LIR_Opr src, LIR_Opr set, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_xchg, src, set, res, tmp)); } 2267 #ifdef ASSERT 2268 void lir_assert(LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, const char* msg, bool halt) { append(new LIR_OpAssert(condition, opr1, opr2, msg, halt)); } 2269 #endif 2270 }; 2271 2272 void print_LIR(BlockList* blocks); 2273 2274 class LIR_InsertionBuffer : public CompilationResourceObj { 2275 private: 2276 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized) 2277 2278 // list of insertion points. index and count are stored alternately: 2279 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted 2280 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index 2281 intStack _index_and_count; 2282 2283 // the LIR_Ops to be inserted 2284 LIR_OpList _ops; 2285 2286 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); } 2287 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); } 2288 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); } 2289 2290 #ifdef ASSERT 2291 void verify(); 2292 #endif 2293 public: 2294 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { } 2295 2296 // must be called before using the insertion buffer 2297 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); } 2298 bool initialized() const { return _lir != NULL; } 2299 // called automatically when the buffer is appended to the LIR_List 2300 void finish() { _lir = NULL; } 2301 2302 // accessors 2303 LIR_List* lir_list() const { return _lir; } 2304 int number_of_insertion_points() const { return _index_and_count.length() >> 1; } 2305 int index_at(int i) const { return _index_and_count.at((i << 1)); } 2306 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); } 2307 2308 int number_of_ops() const { return _ops.length(); } 2309 LIR_Op* op_at(int i) const { return _ops.at(i); } 2310 2311 // append an instruction to the buffer 2312 void append(int index, LIR_Op* op); 2313 2314 // instruction 2315 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); } 2316 }; 2317 2318 2319 // 2320 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way. 2321 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes 2322 // information about the input, output and temporaries used by the 2323 // op to be recorded. It also records whether the op has call semantics 2324 // and also records all the CodeEmitInfos used by this op. 2325 // 2326 2327 2328 class LIR_OpVisitState: public StackObj { 2329 public: 2330 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode; 2331 2332 enum { 2333 maxNumberOfOperands = 20, 2334 maxNumberOfInfos = 4 2335 }; 2336 2337 private: 2338 LIR_Op* _op; 2339 2340 // optimization: the operands and infos are not stored in a variable-length 2341 // list, but in a fixed-size array to save time of size checks and resizing 2342 int _oprs_len[numModes]; 2343 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands]; 2344 int _info_len; 2345 CodeEmitInfo* _info_new[maxNumberOfInfos]; 2346 2347 bool _has_call; 2348 bool _has_slow_case; 2349 2350 2351 // only include register operands 2352 // addresses are decomposed to the base and index registers 2353 // constants and stack operands are ignored 2354 void append(LIR_Opr& opr, OprMode mode) { 2355 assert(opr->is_valid(), "should not call this otherwise"); 2356 assert(mode >= 0 && mode < numModes, "bad mode"); 2357 2358 if (opr->is_register()) { 2359 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); 2360 _oprs_new[mode][_oprs_len[mode]++] = &opr; 2361 2362 } else if (opr->is_pointer()) { 2363 LIR_Address* address = opr->as_address_ptr(); 2364 if (address != NULL) { 2365 // special handling for addresses: add base and index register of the address 2366 // both are always input operands or temp if we want to extend 2367 // their liveness! 2368 if (mode == outputMode) { 2369 mode = inputMode; 2370 } 2371 assert (mode == inputMode || mode == tempMode, "input or temp only for addresses"); 2372 if (address->_base->is_valid()) { 2373 assert(address->_base->is_register(), "must be"); 2374 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); 2375 _oprs_new[mode][_oprs_len[mode]++] = &address->_base; 2376 } 2377 if (address->_index->is_valid()) { 2378 assert(address->_index->is_register(), "must be"); 2379 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow"); 2380 _oprs_new[mode][_oprs_len[mode]++] = &address->_index; 2381 } 2382 2383 } else { 2384 assert(opr->is_constant(), "constant operands are not processed"); 2385 } 2386 } else { 2387 assert(opr->is_stack(), "stack operands are not processed"); 2388 } 2389 } 2390 2391 void append(CodeEmitInfo* info) { 2392 assert(info != NULL, "should not call this otherwise"); 2393 assert(_info_len < maxNumberOfInfos, "array overflow"); 2394 _info_new[_info_len++] = info; 2395 } 2396 2397 public: 2398 LIR_OpVisitState() { reset(); } 2399 2400 LIR_Op* op() const { return _op; } 2401 void set_op(LIR_Op* op) { reset(); _op = op; } 2402 2403 bool has_call() const { return _has_call; } 2404 bool has_slow_case() const { return _has_slow_case; } 2405 2406 void reset() { 2407 _op = NULL; 2408 _has_call = false; 2409 _has_slow_case = false; 2410 2411 _oprs_len[inputMode] = 0; 2412 _oprs_len[tempMode] = 0; 2413 _oprs_len[outputMode] = 0; 2414 _info_len = 0; 2415 } 2416 2417 2418 int opr_count(OprMode mode) const { 2419 assert(mode >= 0 && mode < numModes, "bad mode"); 2420 return _oprs_len[mode]; 2421 } 2422 2423 LIR_Opr opr_at(OprMode mode, int index) const { 2424 assert(mode >= 0 && mode < numModes, "bad mode"); 2425 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); 2426 return *_oprs_new[mode][index]; 2427 } 2428 2429 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const { 2430 assert(mode >= 0 && mode < numModes, "bad mode"); 2431 assert(index >= 0 && index < _oprs_len[mode], "index out of bound"); 2432 *_oprs_new[mode][index] = opr; 2433 } 2434 2435 int info_count() const { 2436 return _info_len; 2437 } 2438 2439 CodeEmitInfo* info_at(int index) const { 2440 assert(index < _info_len, "index out of bounds"); 2441 return _info_new[index]; 2442 } 2443 2444 XHandlers* all_xhandler(); 2445 2446 // collects all register operands of the instruction 2447 void visit(LIR_Op* op); 2448 2449 #ifdef ASSERT 2450 // check that an operation has no operands 2451 bool no_operands(LIR_Op* op); 2452 #endif 2453 2454 // LIR_Op visitor functions use these to fill in the state 2455 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); } 2456 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); } 2457 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); } 2458 void do_info(CodeEmitInfo* info) { append(info); } 2459 2460 void do_stub(CodeStub* stub); 2461 void do_call() { _has_call = true; } 2462 void do_slow_case() { _has_slow_case = true; } 2463 void do_slow_case(CodeEmitInfo* info) { 2464 _has_slow_case = true; 2465 append(info); 2466 } 2467 }; 2468 2469 2470 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; }; 2471 2472 #endif // SHARE_VM_C1_C1_LIR_HPP