1 /*
2 * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_InstructionPrinter.hpp"
27 #include "c1/c1_LIR.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_ValueStack.hpp"
30 #include "ci/ciInstance.hpp"
31 #include "runtime/sharedRuntime.hpp"
32
33 Register LIR_OprDesc::as_register() const {
34 return FrameMap::cpu_rnr2reg(cpu_regnr());
35 }
36
37 Register LIR_OprDesc::as_register_lo() const {
38 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
39 }
40
41 Register LIR_OprDesc::as_register_hi() const {
42 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
43 }
44
45 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
46
47 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
48 ValueTag tag = type->tag();
49 switch (tag) {
50 case metaDataTag : {
51 ClassConstant* c = type->as_ClassConstant();
52 if (c != NULL && !c->value()->is_loaded()) {
53 return LIR_OprFact::metadataConst(NULL);
54 } else if (c != NULL) {
55 return LIR_OprFact::metadataConst(c->value()->constant_encoding());
56 } else {
57 MethodConstant* m = type->as_MethodConstant();
58 assert (m != NULL, "not a class or a method?");
59 return LIR_OprFact::metadataConst(m->value()->constant_encoding());
60 }
61 }
62 case objectTag : {
63 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
64 }
65 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
66 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
67 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
68 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
69 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
70 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
71 }
72 }
73
74
75 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
76 switch (type->tag()) {
77 case objectTag: return LIR_OprFact::oopConst(NULL);
78 case addressTag:return LIR_OprFact::addressConst(0);
79 case intTag: return LIR_OprFact::intConst(0);
80 case floatTag: return LIR_OprFact::floatConst(0.0);
81 case longTag: return LIR_OprFact::longConst(0);
82 case doubleTag: return LIR_OprFact::doubleConst(0.0);
83 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
84 }
85 return illegalOpr;
86 }
87
88
89
90 //---------------------------------------------------
91
92
93 LIR_Address::Scale LIR_Address::scale(BasicType type) {
94 int elem_size = type2aelembytes(type);
95 switch (elem_size) {
96 case 1: return LIR_Address::times_1;
97 case 2: return LIR_Address::times_2;
98 case 4: return LIR_Address::times_4;
99 case 8: return LIR_Address::times_8;
100 }
101 ShouldNotReachHere();
102 return LIR_Address::times_1;
103 }
104
105 //---------------------------------------------------
106
107 char LIR_OprDesc::type_char(BasicType t) {
108 switch (t) {
109 case T_ARRAY:
110 case T_VALUETYPE:
111 t = T_OBJECT;
112 case T_BOOLEAN:
113 case T_CHAR:
114 case T_FLOAT:
115 case T_DOUBLE:
116 case T_BYTE:
117 case T_SHORT:
118 case T_INT:
119 case T_LONG:
120 case T_OBJECT:
121 case T_ADDRESS:
122 case T_VOID:
123 return ::type2char(t);
124 case T_METADATA:
125 return 'M';
126 case T_ILLEGAL:
127 return '?';
128
129 default:
130 ShouldNotReachHere();
131 return '?';
132 }
133 }
134
135 #ifndef PRODUCT
136 void LIR_OprDesc::validate_type() const {
137
138 #ifdef ASSERT
139 if (!is_pointer() && !is_illegal()) {
140 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
141 switch (as_BasicType(type_field())) {
142 case T_LONG:
143 assert((kindfield == cpu_register || kindfield == stack_value) &&
144 size_field() == double_size, "must match");
145 break;
146 case T_FLOAT:
147 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
148 assert((kindfield == fpu_register || kindfield == stack_value
149 ARM_ONLY(|| kindfield == cpu_register)
150 PPC32_ONLY(|| kindfield == cpu_register) ) &&
151 size_field() == single_size, "must match");
152 break;
153 case T_DOUBLE:
154 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
155 assert((kindfield == fpu_register || kindfield == stack_value
156 ARM_ONLY(|| kindfield == cpu_register)
157 PPC32_ONLY(|| kindfield == cpu_register) ) &&
158 size_field() == double_size, "must match");
159 break;
160 case T_BOOLEAN:
161 case T_CHAR:
162 case T_BYTE:
163 case T_SHORT:
164 case T_INT:
165 case T_ADDRESS:
166 case T_OBJECT:
167 case T_METADATA:
168 case T_ARRAY:
169 case T_VALUETYPE:
170 assert((kindfield == cpu_register || kindfield == stack_value) &&
171 size_field() == single_size, "must match");
172 break;
173
174 case T_ILLEGAL:
175 // XXX TKR also means unknown right now
176 // assert(is_illegal(), "must match");
177 break;
178
179 default:
180 ShouldNotReachHere();
181 }
182 }
183 #endif
184
185 }
186 #endif // PRODUCT
187
188
189 bool LIR_OprDesc::is_oop() const {
190 if (is_pointer()) {
191 return pointer()->is_oop_pointer();
192 } else {
193 OprType t= type_field();
194 assert(t != unknown_type, "not set");
195 return t == object_type;
196 }
197 }
198
199
200
201 void LIR_Op2::verify() const {
202 #ifdef ASSERT
203 switch (code()) {
204 case lir_cmove:
205 case lir_xchg:
206 break;
207
208 default:
209 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
210 "can't produce oops from arith");
211 }
212
213 if (TwoOperandLIRForm) {
214
215 #ifdef ASSERT
216 bool threeOperandForm = false;
217 #ifdef S390
218 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
219 threeOperandForm =
220 code() == lir_shl ||
221 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
222 #endif
223 #endif
224
225 switch (code()) {
226 case lir_add:
227 case lir_sub:
228 case lir_mul:
229 case lir_mul_strictfp:
230 case lir_div:
231 case lir_div_strictfp:
232 case lir_rem:
233 case lir_logic_and:
234 case lir_logic_or:
235 case lir_logic_xor:
236 case lir_shl:
237 case lir_shr:
238 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
239 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
240 break;
241
242 // special handling for lir_ushr because of write barriers
243 case lir_ushr:
244 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
245 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
246 break;
247
248 default:
249 break;
250 }
251 }
252 #endif
253 }
254
255
256 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
257 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
258 , _cond(cond)
259 , _type(type)
260 , _label(block->label())
261 , _block(block)
262 , _ublock(NULL)
263 , _stub(NULL) {
264 }
265
266 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
267 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
268 , _cond(cond)
269 , _type(type)
270 , _label(stub->entry())
271 , _block(NULL)
272 , _ublock(NULL)
273 , _stub(stub) {
274 }
275
276 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
277 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
278 , _cond(cond)
279 , _type(type)
280 , _label(block->label())
281 , _block(block)
282 , _ublock(ublock)
283 , _stub(NULL)
284 {
285 }
286
287 void LIR_OpBranch::change_block(BlockBegin* b) {
288 assert(_block != NULL, "must have old block");
289 assert(_block->label() == label(), "must be equal");
290
291 _block = b;
292 _label = b->label();
293 }
294
295 void LIR_OpBranch::change_ublock(BlockBegin* b) {
296 assert(_ublock != NULL, "must have old block");
297 _ublock = b;
298 }
299
300 void LIR_OpBranch::negate_cond() {
301 switch (_cond) {
302 case lir_cond_equal: _cond = lir_cond_notEqual; break;
303 case lir_cond_notEqual: _cond = lir_cond_equal; break;
304 case lir_cond_less: _cond = lir_cond_greaterEqual; break;
305 case lir_cond_lessEqual: _cond = lir_cond_greater; break;
306 case lir_cond_greaterEqual: _cond = lir_cond_less; break;
307 case lir_cond_greater: _cond = lir_cond_lessEqual; break;
308 default: ShouldNotReachHere();
309 }
310 }
311
312
313 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
314 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
315 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
316 CodeStub* stub, bool need_null_check)
317
318 : LIR_Op(code, result, NULL)
319 , _object(object)
320 , _array(LIR_OprFact::illegalOpr)
321 , _klass(klass)
322 , _tmp1(tmp1)
323 , _tmp2(tmp2)
324 , _tmp3(tmp3)
325 , _fast_check(fast_check)
326 , _info_for_patch(info_for_patch)
327 , _info_for_exception(info_for_exception)
328 , _stub(stub)
329 , _profiled_method(NULL)
330 , _profiled_bci(-1)
331 , _should_profile(false)
332 , _need_null_check(need_null_check)
333 {
334 if (code == lir_checkcast) {
335 assert(info_for_exception != NULL, "checkcast throws exceptions");
336 } else if (code == lir_instanceof) {
337 assert(info_for_exception == NULL, "instanceof throws no exceptions");
338 } else {
339 ShouldNotReachHere();
340 }
341 }
342
343
344
345 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
346 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
347 , _object(object)
348 , _array(array)
349 , _klass(NULL)
350 , _tmp1(tmp1)
351 , _tmp2(tmp2)
352 , _tmp3(tmp3)
353 , _fast_check(false)
354 , _info_for_patch(NULL)
355 , _info_for_exception(info_for_exception)
356 , _stub(NULL)
357 , _profiled_method(NULL)
358 , _profiled_bci(-1)
359 , _should_profile(false)
360 , _need_null_check(true)
361 {
362 if (code == lir_store_check) {
363 _stub = new ArrayStoreExceptionStub(object, info_for_exception);
364 assert(info_for_exception != NULL, "store_check throws exceptions");
365 } else {
366 ShouldNotReachHere();
367 }
368 }
369
370
371 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
372 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
373 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
374 , _src(src)
375 , _src_pos(src_pos)
376 , _dst(dst)
377 , _dst_pos(dst_pos)
378 , _length(length)
379 , _tmp(tmp)
380 , _expected_type(expected_type)
381 , _flags(flags) {
382 _stub = new ArrayCopyStub(this);
383 }
384
385 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
386 : LIR_Op(lir_updatecrc32, res, NULL)
387 , _crc(crc)
388 , _val(val) {
389 }
390
391 //-------------------verify--------------------------
392
393 void LIR_Op1::verify() const {
394 switch(code()) {
395 case lir_move:
396 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
397 break;
398 case lir_null_check:
399 assert(in_opr()->is_register(), "must be");
400 break;
401 case lir_return:
402 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
403 break;
404 default:
405 break;
406 }
407 }
408
409 void LIR_OpRTCall::verify() const {
410 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
411 }
412
413 //-------------------visits--------------------------
414
415 // complete rework of LIR instruction visitor.
416 // The virtual call for each instruction type is replaced by a big
417 // switch that adds the operands for each instruction
418
419 void LIR_OpVisitState::visit(LIR_Op* op) {
420 // copy information from the LIR_Op
421 reset();
422 set_op(op);
423
424 switch (op->code()) {
425
426 // LIR_Op0
427 case lir_word_align: // result and info always invalid
428 case lir_backwardbranch_target: // result and info always invalid
429 case lir_build_frame: // result and info always invalid
430 case lir_fpop_raw: // result and info always invalid
431 case lir_24bit_FPU: // result and info always invalid
432 case lir_reset_FPU: // result and info always invalid
433 case lir_breakpoint: // result and info always invalid
434 case lir_membar: // result and info always invalid
435 case lir_membar_acquire: // result and info always invalid
436 case lir_membar_release: // result and info always invalid
437 case lir_membar_loadload: // result and info always invalid
438 case lir_membar_storestore: // result and info always invalid
439 case lir_membar_loadstore: // result and info always invalid
440 case lir_membar_storeload: // result and info always invalid
441 case lir_on_spin_wait:
442 {
443 assert(op->as_Op0() != NULL, "must be");
444 assert(op->_info == NULL, "info not used by this instruction");
445 assert(op->_result->is_illegal(), "not used");
446 break;
447 }
448
449 case lir_nop: // may have info, result always invalid
450 case lir_std_entry: // may have result, info always invalid
451 case lir_osr_entry: // may have result, info always invalid
452 case lir_get_thread: // may have result, info always invalid
453 {
454 assert(op->as_Op0() != NULL, "must be");
455 if (op->_info != NULL) do_info(op->_info);
456 if (op->_result->is_valid()) do_output(op->_result);
457 break;
458 }
459
460
461 // LIR_OpLabel
462 case lir_label: // result and info always invalid
463 {
464 assert(op->as_OpLabel() != NULL, "must be");
465 assert(op->_info == NULL, "info not used by this instruction");
466 assert(op->_result->is_illegal(), "not used");
467 break;
468 }
469
470
471 // LIR_Op1
472 case lir_fxch: // input always valid, result and info always invalid
473 case lir_fld: // input always valid, result and info always invalid
474 case lir_ffree: // input always valid, result and info always invalid
475 case lir_push: // input always valid, result and info always invalid
476 case lir_pop: // input always valid, result and info always invalid
477 case lir_return: // input always valid, result and info always invalid
478 case lir_leal: // input and result always valid, info always invalid
479 case lir_monaddr: // input and result always valid, info always invalid
480 case lir_null_check: // input and info always valid, result always invalid
481 case lir_move: // input and result always valid, may have info
482 case lir_pack64: // input and result always valid
483 case lir_unpack64: // input and result always valid
484 {
485 assert(op->as_Op1() != NULL, "must be");
486 LIR_Op1* op1 = (LIR_Op1*)op;
487
488 if (op1->_info) do_info(op1->_info);
489 if (op1->_opr->is_valid()) do_input(op1->_opr);
490 if (op1->_result->is_valid()) do_output(op1->_result);
491
492 break;
493 }
494
495 case lir_safepoint:
496 {
497 assert(op->as_Op1() != NULL, "must be");
498 LIR_Op1* op1 = (LIR_Op1*)op;
499
500 assert(op1->_info != NULL, ""); do_info(op1->_info);
501 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
502 assert(op1->_result->is_illegal(), "safepoint does not produce value");
503
504 break;
505 }
506
507 // LIR_OpConvert;
508 case lir_convert: // input and result always valid, info always invalid
509 {
510 assert(op->as_OpConvert() != NULL, "must be");
511 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
512
513 assert(opConvert->_info == NULL, "must be");
514 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
515 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
516 #ifdef PPC32
517 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1);
518 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2);
519 #endif
520 do_stub(opConvert->_stub);
521
522 break;
523 }
524
525 // LIR_OpBranch;
526 case lir_branch: // may have info, input and result register always invalid
527 case lir_cond_float_branch: // may have info, input and result register always invalid
528 {
529 assert(op->as_OpBranch() != NULL, "must be");
530 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
531
532 if (opBranch->_info != NULL) do_info(opBranch->_info);
533 assert(opBranch->_result->is_illegal(), "not used");
534 if (opBranch->_stub != NULL) opBranch->stub()->visit(this);
535
536 break;
537 }
538
539
540 // LIR_OpAllocObj
541 case lir_alloc_object:
542 {
543 assert(op->as_OpAllocObj() != NULL, "must be");
544 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
545
546 if (opAllocObj->_info) do_info(opAllocObj->_info);
547 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
548 do_temp(opAllocObj->_opr);
549 }
550 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
551 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
552 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
553 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
554 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
555 do_stub(opAllocObj->_stub);
556 break;
557 }
558
559
560 // LIR_OpRoundFP;
561 case lir_roundfp: {
562 assert(op->as_OpRoundFP() != NULL, "must be");
563 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
564
565 assert(op->_info == NULL, "info not used by this instruction");
566 assert(opRoundFP->_tmp->is_illegal(), "not used");
567 do_input(opRoundFP->_opr);
568 do_output(opRoundFP->_result);
569
570 break;
571 }
572
573
574 // LIR_Op2
575 case lir_cmp:
576 case lir_cmp_l2i:
577 case lir_ucmp_fd2i:
578 case lir_cmp_fd2i:
579 case lir_add:
580 case lir_sub:
581 case lir_mul:
582 case lir_div:
583 case lir_rem:
584 case lir_sqrt:
585 case lir_abs:
586 case lir_neg:
587 case lir_logic_and:
588 case lir_logic_or:
589 case lir_logic_xor:
590 case lir_shl:
591 case lir_shr:
592 case lir_ushr:
593 case lir_xadd:
594 case lir_xchg:
595 case lir_assert:
596 {
597 assert(op->as_Op2() != NULL, "must be");
598 LIR_Op2* op2 = (LIR_Op2*)op;
599 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
600 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
601
602 if (op2->_info) do_info(op2->_info);
603 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
604 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
605 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
606 if (op2->_result->is_valid()) do_output(op2->_result);
607 if (op->code() == lir_xchg || op->code() == lir_xadd) {
608 // on ARM and PPC, return value is loaded first so could
609 // destroy inputs. On other platforms that implement those
610 // (x86, sparc), the extra constrainsts are harmless.
611 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
612 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
613 }
614
615 break;
616 }
617
618 // special handling for cmove: right input operand must not be equal
619 // to the result operand, otherwise the backend fails
620 case lir_cmove:
621 {
622 assert(op->as_Op2() != NULL, "must be");
623 LIR_Op2* op2 = (LIR_Op2*)op;
624
625 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
626 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
627 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
628
629 do_input(op2->_opr1);
630 do_input(op2->_opr2);
631 do_temp(op2->_opr2);
632 do_output(op2->_result);
633
634 break;
635 }
636
637 // vspecial handling for strict operations: register input operands
638 // as temp to guarantee that they do not overlap with other
639 // registers
640 case lir_mul_strictfp:
641 case lir_div_strictfp:
642 {
643 assert(op->as_Op2() != NULL, "must be");
644 LIR_Op2* op2 = (LIR_Op2*)op;
645
646 assert(op2->_info == NULL, "not used");
647 assert(op2->_opr1->is_valid(), "used");
648 assert(op2->_opr2->is_valid(), "used");
649 assert(op2->_result->is_valid(), "used");
650 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
651 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
652
653 do_input(op2->_opr1); do_temp(op2->_opr1);
654 do_input(op2->_opr2); do_temp(op2->_opr2);
655 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
656 do_output(op2->_result);
657
658 break;
659 }
660
661 case lir_throw: {
662 assert(op->as_Op2() != NULL, "must be");
663 LIR_Op2* op2 = (LIR_Op2*)op;
664
665 if (op2->_info) do_info(op2->_info);
666 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
667 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
668 assert(op2->_result->is_illegal(), "no result");
669 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
670 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
671
672 break;
673 }
674
675 case lir_unwind: {
676 assert(op->as_Op1() != NULL, "must be");
677 LIR_Op1* op1 = (LIR_Op1*)op;
678
679 assert(op1->_info == NULL, "no info");
680 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
681 assert(op1->_result->is_illegal(), "no result");
682
683 break;
684 }
685
686 // LIR_Op3
687 case lir_idiv:
688 case lir_irem: {
689 assert(op->as_Op3() != NULL, "must be");
690 LIR_Op3* op3= (LIR_Op3*)op;
691
692 if (op3->_info) do_info(op3->_info);
693 if (op3->_opr1->is_valid()) do_input(op3->_opr1);
694
695 // second operand is input and temp, so ensure that second operand
696 // and third operand get not the same register
697 if (op3->_opr2->is_valid()) do_input(op3->_opr2);
698 if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
699 if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
700
701 if (op3->_result->is_valid()) do_output(op3->_result);
702
703 break;
704 }
705
706 case lir_fmad:
707 case lir_fmaf: {
708 assert(op->as_Op3() != NULL, "must be");
709 LIR_Op3* op3= (LIR_Op3*)op;
710 assert(op3->_info == NULL, "no info");
711 do_input(op3->_opr1);
712 do_input(op3->_opr2);
713 do_input(op3->_opr3);
714 do_output(op3->_result);
715 break;
716 }
717
718 // LIR_OpJavaCall
719 case lir_static_call:
720 case lir_optvirtual_call:
721 case lir_icvirtual_call:
722 case lir_virtual_call:
723 case lir_dynamic_call: {
724 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
725 assert(opJavaCall != NULL, "must be");
726
727 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
728
729 // only visit register parameters
730 int n = opJavaCall->_arguments->length();
731 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
732 if (!opJavaCall->_arguments->at(i)->is_pointer()) {
733 do_input(*opJavaCall->_arguments->adr_at(i));
734 }
735 }
736
737 if (opJavaCall->_info) do_info(opJavaCall->_info);
738 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr &&
739 opJavaCall->is_method_handle_invoke()) {
740 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
741 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
742 }
743 do_call();
744 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
745
746 break;
747 }
748
749
750 // LIR_OpRTCall
751 case lir_rtcall: {
752 assert(op->as_OpRTCall() != NULL, "must be");
753 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
754
755 // only visit register parameters
756 int n = opRTCall->_arguments->length();
757 for (int i = 0; i < n; i++) {
758 if (!opRTCall->_arguments->at(i)->is_pointer()) {
759 do_input(*opRTCall->_arguments->adr_at(i));
760 }
761 }
762 if (opRTCall->_info) do_info(opRTCall->_info);
763 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
764 do_call();
765 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
766
767 break;
768 }
769
770
771 // LIR_OpArrayCopy
772 case lir_arraycopy: {
773 assert(op->as_OpArrayCopy() != NULL, "must be");
774 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
775
776 assert(opArrayCopy->_result->is_illegal(), "unused");
777 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
778 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
779 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
780 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
781 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
782 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
783 if (opArrayCopy->_info) do_info(opArrayCopy->_info);
784
785 // the implementation of arraycopy always has a call into the runtime
786 do_call();
787
788 break;
789 }
790
791
792 // LIR_OpUpdateCRC32
793 case lir_updatecrc32: {
794 assert(op->as_OpUpdateCRC32() != NULL, "must be");
795 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
796
797 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc);
798 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val);
799 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result);
800 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32");
801
802 break;
803 }
804
805
806 // LIR_OpLock
807 case lir_lock:
808 case lir_unlock: {
809 assert(op->as_OpLock() != NULL, "must be");
810 LIR_OpLock* opLock = (LIR_OpLock*)op;
811
812 if (opLock->_info) do_info(opLock->_info);
813
814 // TODO: check if these operands really have to be temp
815 // (or if input is sufficient). This may have influence on the oop map!
816 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
817 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
818 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
819
820 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
821 assert(opLock->_result->is_illegal(), "unused");
822
823 do_stub(opLock->_stub);
824 do_stub(opLock->_throw_imse_stub);
825
826 break;
827 }
828
829
830 // LIR_OpDelay
831 case lir_delay_slot: {
832 assert(op->as_OpDelay() != NULL, "must be");
833 LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
834
835 visit(opDelay->delay_op());
836 break;
837 }
838
839 // LIR_OpTypeCheck
840 case lir_instanceof:
841 case lir_checkcast:
842 case lir_store_check: {
843 assert(op->as_OpTypeCheck() != NULL, "must be");
844 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
845
846 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
847 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
848 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
849 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
850 do_temp(opTypeCheck->_object);
851 }
852 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
853 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
854 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
855 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
856 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
857 do_stub(opTypeCheck->_stub);
858 break;
859 }
860
861 // LIR_OpCompareAndSwap
862 case lir_cas_long:
863 case lir_cas_obj:
864 case lir_cas_int: {
865 assert(op->as_OpCompareAndSwap() != NULL, "must be");
866 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
867
868 assert(opCompareAndSwap->_addr->is_valid(), "used");
869 assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
870 assert(opCompareAndSwap->_new_value->is_valid(), "used");
871 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info);
872 do_input(opCompareAndSwap->_addr);
873 do_temp(opCompareAndSwap->_addr);
874 do_input(opCompareAndSwap->_cmp_value);
875 do_temp(opCompareAndSwap->_cmp_value);
876 do_input(opCompareAndSwap->_new_value);
877 do_temp(opCompareAndSwap->_new_value);
878 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1);
879 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2);
880 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result);
881
882 break;
883 }
884
885
886 // LIR_OpAllocArray;
887 case lir_alloc_array: {
888 assert(op->as_OpAllocArray() != NULL, "must be");
889 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
890
891 if (opAllocArray->_info) do_info(opAllocArray->_info);
892 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
893 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len);
894 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
895 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
896 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
897 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
898 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
899 do_stub(opAllocArray->_stub);
900 break;
901 }
902
903 // LIR_OpProfileCall:
904 case lir_profile_call: {
905 assert(op->as_OpProfileCall() != NULL, "must be");
906 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
907
908 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
909 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
910 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
911 break;
912 }
913
914 // LIR_OpProfileType:
915 case lir_profile_type: {
916 assert(op->as_OpProfileType() != NULL, "must be");
917 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
918
919 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
920 do_input(opProfileType->_obj);
921 do_temp(opProfileType->_tmp);
922 break;
923 }
924 default:
925 op->visit(this);
926 }
927 }
928
929 void LIR_Op::visit(LIR_OpVisitState* state) {
930 ShouldNotReachHere();
931 }
932
933 void LIR_OpVisitState::do_stub(CodeStub* stub) {
934 if (stub != NULL) {
935 stub->visit(this);
936 }
937 }
938
939 XHandlers* LIR_OpVisitState::all_xhandler() {
940 XHandlers* result = NULL;
941
942 int i;
943 for (i = 0; i < info_count(); i++) {
944 if (info_at(i)->exception_handlers() != NULL) {
945 result = info_at(i)->exception_handlers();
946 break;
947 }
948 }
949
950 #ifdef ASSERT
951 for (i = 0; i < info_count(); i++) {
952 assert(info_at(i)->exception_handlers() == NULL ||
953 info_at(i)->exception_handlers() == result,
954 "only one xhandler list allowed per LIR-operation");
955 }
956 #endif
957
958 if (result != NULL) {
959 return result;
960 } else {
961 return new XHandlers();
962 }
963
964 return result;
965 }
966
967
968 #ifdef ASSERT
969 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
970 visit(op);
971
972 return opr_count(inputMode) == 0 &&
973 opr_count(outputMode) == 0 &&
974 opr_count(tempMode) == 0 &&
975 info_count() == 0 &&
976 !has_call() &&
977 !has_slow_case();
978 }
979 #endif
980
981 //---------------------------------------------------
982
983
984 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
985 masm->emit_call(this);
986 }
987
988 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
989 masm->emit_rtcall(this);
990 }
991
992 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
993 masm->emit_opLabel(this);
994 }
995
996 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
997 masm->emit_arraycopy(this);
998 masm->append_code_stub(stub());
999 }
1000
1001 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
1002 masm->emit_updatecrc32(this);
1003 }
1004
1005 void LIR_Op0::emit_code(LIR_Assembler* masm) {
1006 masm->emit_op0(this);
1007 }
1008
1009 void LIR_Op1::emit_code(LIR_Assembler* masm) {
1010 masm->emit_op1(this);
1011 }
1012
1013 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
1014 masm->emit_alloc_obj(this);
1015 masm->append_code_stub(stub());
1016 }
1017
1018 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
1019 masm->emit_opBranch(this);
1020 if (stub()) {
1021 masm->append_code_stub(stub());
1022 }
1023 }
1024
1025 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
1026 masm->emit_opConvert(this);
1027 if (stub() != NULL) {
1028 masm->append_code_stub(stub());
1029 }
1030 }
1031
1032 void LIR_Op2::emit_code(LIR_Assembler* masm) {
1033 masm->emit_op2(this);
1034 }
1035
1036 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1037 masm->emit_alloc_array(this);
1038 masm->append_code_stub(stub());
1039 }
1040
1041 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1042 masm->emit_opTypeCheck(this);
1043 if (stub()) {
1044 masm->append_code_stub(stub());
1045 }
1046 }
1047
1048 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1049 masm->emit_compare_and_swap(this);
1050 }
1051
1052 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1053 masm->emit_op3(this);
1054 }
1055
1056 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1057 masm->emit_lock(this);
1058 if (stub()) {
1059 masm->append_code_stub(stub());
1060 }
1061 if (throw_imse_stub()) {
1062 masm->append_code_stub(throw_imse_stub());
1063 }
1064 }
1065
1066 #ifdef ASSERT
1067 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1068 masm->emit_assert(this);
1069 }
1070 #endif
1071
1072 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1073 masm->emit_delay(this);
1074 }
1075
1076 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1077 masm->emit_profile_call(this);
1078 }
1079
1080 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1081 masm->emit_profile_type(this);
1082 }
1083
1084 // LIR_List
1085 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1086 : _operations(8)
1087 , _compilation(compilation)
1088 #ifndef PRODUCT
1089 , _block(block)
1090 #endif
1091 #ifdef ASSERT
1092 , _file(NULL)
1093 , _line(0)
1094 #endif
1095 { }
1096
1097
1098 #ifdef ASSERT
1099 void LIR_List::set_file_and_line(const char * file, int line) {
1100 const char * f = strrchr(file, '/');
1101 if (f == NULL) f = strrchr(file, '\\');
1102 if (f == NULL) {
1103 f = file;
1104 } else {
1105 f++;
1106 }
1107 _file = f;
1108 _line = line;
1109 }
1110 #endif
1111
1112
1113 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1114 assert(this == buffer->lir_list(), "wrong lir list");
1115 const int n = _operations.length();
1116
1117 if (buffer->number_of_ops() > 0) {
1118 // increase size of instructions list
1119 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1120 // insert ops from buffer into instructions list
1121 int op_index = buffer->number_of_ops() - 1;
1122 int ip_index = buffer->number_of_insertion_points() - 1;
1123 int from_index = n - 1;
1124 int to_index = _operations.length() - 1;
1125 for (; ip_index >= 0; ip_index --) {
1126 int index = buffer->index_at(ip_index);
1127 // make room after insertion point
1128 while (index < from_index) {
1129 _operations.at_put(to_index --, _operations.at(from_index --));
1130 }
1131 // insert ops from buffer
1132 for (int i = buffer->count_at(ip_index); i > 0; i --) {
1133 _operations.at_put(to_index --, buffer->op_at(op_index --));
1134 }
1135 }
1136 }
1137
1138 buffer->finish();
1139 }
1140
1141
1142 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1143 assert(reg->type() == T_OBJECT, "bad reg");
1144 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
1145 }
1146
1147 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1148 assert(reg->type() == T_METADATA, "bad reg");
1149 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1150 }
1151
1152 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1153 append(new LIR_Op1(
1154 lir_move,
1155 LIR_OprFact::address(addr),
1156 src,
1157 addr->type(),
1158 patch_code,
1159 info));
1160 }
1161
1162
1163 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1164 append(new LIR_Op1(
1165 lir_move,
1166 LIR_OprFact::address(address),
1167 dst,
1168 address->type(),
1169 patch_code,
1170 info, lir_move_volatile));
1171 }
1172
1173 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1174 append(new LIR_Op1(
1175 lir_move,
1176 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1177 dst,
1178 type,
1179 patch_code,
1180 info, lir_move_volatile));
1181 }
1182
1183
1184 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1185 append(new LIR_Op1(
1186 lir_move,
1187 LIR_OprFact::intConst(v),
1188 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1189 type,
1190 patch_code,
1191 info));
1192 }
1193
1194
1195 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1196 append(new LIR_Op1(
1197 lir_move,
1198 LIR_OprFact::oopConst(o),
1199 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1200 type,
1201 patch_code,
1202 info));
1203 }
1204
1205
1206 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1207 append(new LIR_Op1(
1208 lir_move,
1209 src,
1210 LIR_OprFact::address(addr),
1211 addr->type(),
1212 patch_code,
1213 info));
1214 }
1215
1216
1217 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1218 append(new LIR_Op1(
1219 lir_move,
1220 src,
1221 LIR_OprFact::address(addr),
1222 addr->type(),
1223 patch_code,
1224 info,
1225 lir_move_volatile));
1226 }
1227
1228 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1229 append(new LIR_Op1(
1230 lir_move,
1231 src,
1232 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1233 type,
1234 patch_code,
1235 info, lir_move_volatile));
1236 }
1237
1238
1239 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1240 append(new LIR_Op3(
1241 lir_idiv,
1242 left,
1243 right,
1244 tmp,
1245 res,
1246 info));
1247 }
1248
1249
1250 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1251 append(new LIR_Op3(
1252 lir_idiv,
1253 left,
1254 LIR_OprFact::intConst(right),
1255 tmp,
1256 res,
1257 info));
1258 }
1259
1260
1261 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1262 append(new LIR_Op3(
1263 lir_irem,
1264 left,
1265 right,
1266 tmp,
1267 res,
1268 info));
1269 }
1270
1271
1272 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1273 append(new LIR_Op3(
1274 lir_irem,
1275 left,
1276 LIR_OprFact::intConst(right),
1277 tmp,
1278 res,
1279 info));
1280 }
1281
1282
1283 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1284 append(new LIR_Op2(
1285 lir_cmp,
1286 condition,
1287 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1288 LIR_OprFact::intConst(c),
1289 info));
1290 }
1291
1292
1293 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1294 append(new LIR_Op2(
1295 lir_cmp,
1296 condition,
1297 reg,
1298 LIR_OprFact::address(addr),
1299 info));
1300 }
1301
1302 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1303 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1304 append(new LIR_OpAllocObj(
1305 klass,
1306 dst,
1307 t1,
1308 t2,
1309 t3,
1310 t4,
1311 header_size,
1312 object_size,
1313 init_check,
1314 stub));
1315 }
1316
1317 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1318 append(new LIR_OpAllocArray(
1319 klass,
1320 len,
1321 dst,
1322 t1,
1323 t2,
1324 t3,
1325 t4,
1326 type,
1327 stub));
1328 }
1329
1330 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1331 append(new LIR_Op2(
1332 lir_shl,
1333 value,
1334 count,
1335 dst,
1336 tmp));
1337 }
1338
1339 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1340 append(new LIR_Op2(
1341 lir_shr,
1342 value,
1343 count,
1344 dst,
1345 tmp));
1346 }
1347
1348
1349 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1350 append(new LIR_Op2(
1351 lir_ushr,
1352 value,
1353 count,
1354 dst,
1355 tmp));
1356 }
1357
1358 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1359 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1360 left,
1361 right,
1362 dst));
1363 }
1364
1365 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info, CodeStub* throw_imse_stub) {
1366 append(new LIR_OpLock(
1367 lir_lock,
1368 hdr,
1369 obj,
1370 lock,
1371 scratch,
1372 stub,
1373 info,
1374 throw_imse_stub));
1375 }
1376
1377 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1378 append(new LIR_OpLock(
1379 lir_unlock,
1380 hdr,
1381 obj,
1382 lock,
1383 scratch,
1384 stub,
1385 NULL));
1386 }
1387
1388
1389 void check_LIR() {
1390 // cannot do the proper checking as PRODUCT and other modes return different results
1391 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
1392 }
1393
1394
1395
1396 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1397 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1398 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1399 ciMethod* profiled_method, int profiled_bci, bool is_never_null) {
1400 // If klass is non-nullable, LIRGenerator::do_CheckCast has already performed null-check
1401 // on the object.
1402 bool need_null_check = !is_never_null;
1403 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1404 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1405 if (profiled_method != NULL) {
1406 c->set_profiled_method(profiled_method);
1407 c->set_profiled_bci(profiled_bci);
1408 c->set_should_profile(true);
1409 }
1410 append(c);
1411 }
1412
1413 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1414 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
1415 if (profiled_method != NULL) {
1416 c->set_profiled_method(profiled_method);
1417 c->set_profiled_bci(profiled_bci);
1418 c->set_should_profile(true);
1419 }
1420 append(c);
1421 }
1422
1423
1424 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1425 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1426 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1427 if (profiled_method != NULL) {
1428 c->set_profiled_method(profiled_method);
1429 c->set_profiled_bci(profiled_bci);
1430 c->set_should_profile(true);
1431 }
1432 append(c);
1433 }
1434
1435 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) {
1436 if (deoptimize_on_null) {
1437 // Emit an explicit null check and deoptimize if opr is null
1438 CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none);
1439 cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL));
1440 branch(lir_cond_equal, T_OBJECT, deopt);
1441 } else {
1442 // Emit an implicit null check
1443 append(new LIR_Op1(lir_null_check, opr, info));
1444 }
1445 }
1446
1447 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1448 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1449 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1450 }
1451
1452 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1453 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1454 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1455 }
1456
1457 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1458 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1459 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1460 }
1461
1462
1463 #ifdef PRODUCT
1464
1465 void print_LIR(BlockList* blocks) {
1466 }
1467
1468 #else
1469 // LIR_OprDesc
1470 void LIR_OprDesc::print() const {
1471 print(tty);
1472 }
1473
1474 void LIR_OprDesc::print(outputStream* out) const {
1475 if (is_illegal()) {
1476 return;
1477 }
1478
1479 out->print("[");
1480 if (is_pointer()) {
1481 pointer()->print_value_on(out);
1482 } else if (is_single_stack()) {
1483 out->print("stack:%d", single_stack_ix());
1484 } else if (is_double_stack()) {
1485 out->print("dbl_stack:%d",double_stack_ix());
1486 } else if (is_virtual()) {
1487 out->print("R%d", vreg_number());
1488 } else if (is_single_cpu()) {
1489 out->print("%s", as_register()->name());
1490 } else if (is_double_cpu()) {
1491 out->print("%s", as_register_hi()->name());
1492 out->print("%s", as_register_lo()->name());
1493 #if defined(X86)
1494 } else if (is_single_xmm()) {
1495 out->print("%s", as_xmm_float_reg()->name());
1496 } else if (is_double_xmm()) {
1497 out->print("%s", as_xmm_double_reg()->name());
1498 } else if (is_single_fpu()) {
1499 out->print("fpu%d", fpu_regnr());
1500 } else if (is_double_fpu()) {
1501 out->print("fpu%d", fpu_regnrLo());
1502 #elif defined(AARCH64)
1503 } else if (is_single_fpu()) {
1504 out->print("fpu%d", fpu_regnr());
1505 } else if (is_double_fpu()) {
1506 out->print("fpu%d", fpu_regnrLo());
1507 #elif defined(ARM)
1508 } else if (is_single_fpu()) {
1509 out->print("s%d", fpu_regnr());
1510 } else if (is_double_fpu()) {
1511 out->print("d%d", fpu_regnrLo() >> 1);
1512 #else
1513 } else if (is_single_fpu()) {
1514 out->print("%s", as_float_reg()->name());
1515 } else if (is_double_fpu()) {
1516 out->print("%s", as_double_reg()->name());
1517 #endif
1518
1519 } else if (is_illegal()) {
1520 out->print("-");
1521 } else {
1522 out->print("Unknown Operand");
1523 }
1524 if (!is_illegal()) {
1525 out->print("|%c", type_char());
1526 }
1527 if (is_register() && is_last_use()) {
1528 out->print("(last_use)");
1529 }
1530 out->print("]");
1531 }
1532
1533
1534 // LIR_Address
1535 void LIR_Const::print_value_on(outputStream* out) const {
1536 switch (type()) {
1537 case T_ADDRESS:out->print("address:%d",as_jint()); break;
1538 case T_INT: out->print("int:%d", as_jint()); break;
1539 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1540 case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
1541 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
1542 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break;
1543 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
1544 default: out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1545 }
1546 }
1547
1548 // LIR_Address
1549 void LIR_Address::print_value_on(outputStream* out) const {
1550 out->print("Base:"); _base->print(out);
1551 if (!_index->is_illegal()) {
1552 out->print(" Index:"); _index->print(out);
1553 switch (scale()) {
1554 case times_1: break;
1555 case times_2: out->print(" * 2"); break;
1556 case times_4: out->print(" * 4"); break;
1557 case times_8: out->print(" * 8"); break;
1558 }
1559 }
1560 out->print(" Disp: " INTX_FORMAT, _disp);
1561 }
1562
1563 // debug output of block header without InstructionPrinter
1564 // (because phi functions are not necessary for LIR)
1565 static void print_block(BlockBegin* x) {
1566 // print block id
1567 BlockEnd* end = x->end();
1568 tty->print("B%d ", x->block_id());
1569
1570 // print flags
1571 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
1572 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
1573 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
1574 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
1575 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
1576 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1577 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
1578
1579 // print block bci range
1580 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
1581
1582 // print predecessors and successors
1583 if (x->number_of_preds() > 0) {
1584 tty->print("preds: ");
1585 for (int i = 0; i < x->number_of_preds(); i ++) {
1586 tty->print("B%d ", x->pred_at(i)->block_id());
1587 }
1588 }
1589
1590 if (x->number_of_sux() > 0) {
1591 tty->print("sux: ");
1592 for (int i = 0; i < x->number_of_sux(); i ++) {
1593 tty->print("B%d ", x->sux_at(i)->block_id());
1594 }
1595 }
1596
1597 // print exception handlers
1598 if (x->number_of_exception_handlers() > 0) {
1599 tty->print("xhandler: ");
1600 for (int i = 0; i < x->number_of_exception_handlers(); i++) {
1601 tty->print("B%d ", x->exception_handler_at(i)->block_id());
1602 }
1603 }
1604
1605 tty->cr();
1606 }
1607
1608 void print_LIR(BlockList* blocks) {
1609 tty->print_cr("LIR:");
1610 int i;
1611 for (i = 0; i < blocks->length(); i++) {
1612 BlockBegin* bb = blocks->at(i);
1613 print_block(bb);
1614 tty->print("__id_Instruction___________________________________________"); tty->cr();
1615 bb->lir()->print_instructions();
1616 }
1617 }
1618
1619 void LIR_List::print_instructions() {
1620 for (int i = 0; i < _operations.length(); i++) {
1621 _operations.at(i)->print(); tty->cr();
1622 }
1623 tty->cr();
1624 }
1625
1626 // LIR_Ops printing routines
1627 // LIR_Op
1628 void LIR_Op::print_on(outputStream* out) const {
1629 if (id() != -1 || PrintCFGToFile) {
1630 out->print("%4d ", id());
1631 } else {
1632 out->print(" ");
1633 }
1634 out->print("%s ", name());
1635 print_instr(out);
1636 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
1637 #ifdef ASSERT
1638 if (Verbose && _file != NULL) {
1639 out->print(" (%s:%d)", _file, _line);
1640 }
1641 #endif
1642 }
1643
1644 const char * LIR_Op::name() const {
1645 const char* s = NULL;
1646 switch(code()) {
1647 // LIR_Op0
1648 case lir_membar: s = "membar"; break;
1649 case lir_membar_acquire: s = "membar_acquire"; break;
1650 case lir_membar_release: s = "membar_release"; break;
1651 case lir_membar_loadload: s = "membar_loadload"; break;
1652 case lir_membar_storestore: s = "membar_storestore"; break;
1653 case lir_membar_loadstore: s = "membar_loadstore"; break;
1654 case lir_membar_storeload: s = "membar_storeload"; break;
1655 case lir_word_align: s = "word_align"; break;
1656 case lir_label: s = "label"; break;
1657 case lir_nop: s = "nop"; break;
1658 case lir_on_spin_wait: s = "on_spin_wait"; break;
1659 case lir_backwardbranch_target: s = "backbranch"; break;
1660 case lir_std_entry: s = "std_entry"; break;
1661 case lir_osr_entry: s = "osr_entry"; break;
1662 case lir_build_frame: s = "build_frm"; break;
1663 case lir_fpop_raw: s = "fpop_raw"; break;
1664 case lir_24bit_FPU: s = "24bit_FPU"; break;
1665 case lir_reset_FPU: s = "reset_FPU"; break;
1666 case lir_breakpoint: s = "breakpoint"; break;
1667 case lir_get_thread: s = "get_thread"; break;
1668 // LIR_Op1
1669 case lir_fxch: s = "fxch"; break;
1670 case lir_fld: s = "fld"; break;
1671 case lir_ffree: s = "ffree"; break;
1672 case lir_push: s = "push"; break;
1673 case lir_pop: s = "pop"; break;
1674 case lir_null_check: s = "null_check"; break;
1675 case lir_return: s = "return"; break;
1676 case lir_safepoint: s = "safepoint"; break;
1677 case lir_leal: s = "leal"; break;
1678 case lir_branch: s = "branch"; break;
1679 case lir_cond_float_branch: s = "flt_cond_br"; break;
1680 case lir_move: s = "move"; break;
1681 case lir_roundfp: s = "roundfp"; break;
1682 case lir_rtcall: s = "rtcall"; break;
1683 case lir_throw: s = "throw"; break;
1684 case lir_unwind: s = "unwind"; break;
1685 case lir_convert: s = "convert"; break;
1686 case lir_alloc_object: s = "alloc_obj"; break;
1687 case lir_monaddr: s = "mon_addr"; break;
1688 case lir_pack64: s = "pack64"; break;
1689 case lir_unpack64: s = "unpack64"; break;
1690 // LIR_Op2
1691 case lir_cmp: s = "cmp"; break;
1692 case lir_cmp_l2i: s = "cmp_l2i"; break;
1693 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1694 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1695 case lir_cmove: s = "cmove"; break;
1696 case lir_add: s = "add"; break;
1697 case lir_sub: s = "sub"; break;
1698 case lir_mul: s = "mul"; break;
1699 case lir_mul_strictfp: s = "mul_strictfp"; break;
1700 case lir_div: s = "div"; break;
1701 case lir_div_strictfp: s = "div_strictfp"; break;
1702 case lir_rem: s = "rem"; break;
1703 case lir_abs: s = "abs"; break;
1704 case lir_neg: s = "neg"; break;
1705 case lir_sqrt: s = "sqrt"; break;
1706 case lir_logic_and: s = "logic_and"; break;
1707 case lir_logic_or: s = "logic_or"; break;
1708 case lir_logic_xor: s = "logic_xor"; break;
1709 case lir_shl: s = "shift_left"; break;
1710 case lir_shr: s = "shift_right"; break;
1711 case lir_ushr: s = "ushift_right"; break;
1712 case lir_alloc_array: s = "alloc_array"; break;
1713 case lir_xadd: s = "xadd"; break;
1714 case lir_xchg: s = "xchg"; break;
1715 // LIR_Op3
1716 case lir_idiv: s = "idiv"; break;
1717 case lir_irem: s = "irem"; break;
1718 case lir_fmad: s = "fmad"; break;
1719 case lir_fmaf: s = "fmaf"; break;
1720 // LIR_OpJavaCall
1721 case lir_static_call: s = "static"; break;
1722 case lir_optvirtual_call: s = "optvirtual"; break;
1723 case lir_icvirtual_call: s = "icvirtual"; break;
1724 case lir_virtual_call: s = "virtual"; break;
1725 case lir_dynamic_call: s = "dynamic"; break;
1726 // LIR_OpArrayCopy
1727 case lir_arraycopy: s = "arraycopy"; break;
1728 // LIR_OpUpdateCRC32
1729 case lir_updatecrc32: s = "updatecrc32"; break;
1730 // LIR_OpLock
1731 case lir_lock: s = "lock"; break;
1732 case lir_unlock: s = "unlock"; break;
1733 // LIR_OpDelay
1734 case lir_delay_slot: s = "delay"; break;
1735 // LIR_OpTypeCheck
1736 case lir_instanceof: s = "instanceof"; break;
1737 case lir_checkcast: s = "checkcast"; break;
1738 case lir_store_check: s = "store_check"; break;
1739 // LIR_OpCompareAndSwap
1740 case lir_cas_long: s = "cas_long"; break;
1741 case lir_cas_obj: s = "cas_obj"; break;
1742 case lir_cas_int: s = "cas_int"; break;
1743 // LIR_OpProfileCall
1744 case lir_profile_call: s = "profile_call"; break;
1745 // LIR_OpProfileType
1746 case lir_profile_type: s = "profile_type"; break;
1747 // LIR_OpAssert
1748 #ifdef ASSERT
1749 case lir_assert: s = "assert"; break;
1750 #endif
1751 case lir_none: ShouldNotReachHere();break;
1752 default: s = "illegal_op"; break;
1753 }
1754 return s;
1755 }
1756
1757 // LIR_OpJavaCall
1758 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1759 out->print("call: ");
1760 out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1761 if (receiver()->is_valid()) {
1762 out->print(" [recv: "); receiver()->print(out); out->print("]");
1763 }
1764 if (result_opr()->is_valid()) {
1765 out->print(" [result: "); result_opr()->print(out); out->print("]");
1766 }
1767 }
1768
1769 // LIR_OpLabel
1770 void LIR_OpLabel::print_instr(outputStream* out) const {
1771 out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1772 }
1773
1774 // LIR_OpArrayCopy
1775 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1776 src()->print(out); out->print(" ");
1777 src_pos()->print(out); out->print(" ");
1778 dst()->print(out); out->print(" ");
1779 dst_pos()->print(out); out->print(" ");
1780 length()->print(out); out->print(" ");
1781 tmp()->print(out); out->print(" ");
1782 }
1783
1784 // LIR_OpUpdateCRC32
1785 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1786 crc()->print(out); out->print(" ");
1787 val()->print(out); out->print(" ");
1788 result_opr()->print(out); out->print(" ");
1789 }
1790
1791 // LIR_OpCompareAndSwap
1792 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1793 addr()->print(out); out->print(" ");
1794 cmp_value()->print(out); out->print(" ");
1795 new_value()->print(out); out->print(" ");
1796 tmp1()->print(out); out->print(" ");
1797 tmp2()->print(out); out->print(" ");
1798
1799 }
1800
1801 // LIR_Op0
1802 void LIR_Op0::print_instr(outputStream* out) const {
1803 result_opr()->print(out);
1804 }
1805
1806 // LIR_Op1
1807 const char * LIR_Op1::name() const {
1808 if (code() == lir_move) {
1809 switch (move_kind()) {
1810 case lir_move_normal:
1811 return "move";
1812 case lir_move_unaligned:
1813 return "unaligned move";
1814 case lir_move_volatile:
1815 return "volatile_move";
1816 case lir_move_wide:
1817 return "wide_move";
1818 default:
1819 ShouldNotReachHere();
1820 return "illegal_op";
1821 }
1822 } else {
1823 return LIR_Op::name();
1824 }
1825 }
1826
1827
1828 void LIR_Op1::print_instr(outputStream* out) const {
1829 _opr->print(out); out->print(" ");
1830 result_opr()->print(out); out->print(" ");
1831 print_patch_code(out, patch_code());
1832 }
1833
1834
1835 // LIR_Op1
1836 void LIR_OpRTCall::print_instr(outputStream* out) const {
1837 intx a = (intx)addr();
1838 out->print("%s", Runtime1::name_for_address(addr()));
1839 out->print(" ");
1840 tmp()->print(out);
1841 }
1842
1843 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1844 switch(code) {
1845 case lir_patch_none: break;
1846 case lir_patch_low: out->print("[patch_low]"); break;
1847 case lir_patch_high: out->print("[patch_high]"); break;
1848 case lir_patch_normal: out->print("[patch_normal]"); break;
1849 default: ShouldNotReachHere();
1850 }
1851 }
1852
1853 // LIR_OpBranch
1854 void LIR_OpBranch::print_instr(outputStream* out) const {
1855 print_condition(out, cond()); out->print(" ");
1856 if (block() != NULL) {
1857 out->print("[B%d] ", block()->block_id());
1858 } else if (stub() != NULL) {
1859 out->print("[");
1860 stub()->print_name(out);
1861 out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1862 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1863 } else {
1864 out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1865 }
1866 if (ublock() != NULL) {
1867 out->print("unordered: [B%d] ", ublock()->block_id());
1868 }
1869 }
1870
1871 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1872 switch(cond) {
1873 case lir_cond_equal: out->print("[EQ]"); break;
1874 case lir_cond_notEqual: out->print("[NE]"); break;
1875 case lir_cond_less: out->print("[LT]"); break;
1876 case lir_cond_lessEqual: out->print("[LE]"); break;
1877 case lir_cond_greaterEqual: out->print("[GE]"); break;
1878 case lir_cond_greater: out->print("[GT]"); break;
1879 case lir_cond_belowEqual: out->print("[BE]"); break;
1880 case lir_cond_aboveEqual: out->print("[AE]"); break;
1881 case lir_cond_always: out->print("[AL]"); break;
1882 default: out->print("[%d]",cond); break;
1883 }
1884 }
1885
1886 // LIR_OpConvert
1887 void LIR_OpConvert::print_instr(outputStream* out) const {
1888 print_bytecode(out, bytecode());
1889 in_opr()->print(out); out->print(" ");
1890 result_opr()->print(out); out->print(" ");
1891 #ifdef PPC32
1892 if(tmp1()->is_valid()) {
1893 tmp1()->print(out); out->print(" ");
1894 tmp2()->print(out); out->print(" ");
1895 }
1896 #endif
1897 }
1898
1899 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1900 switch(code) {
1901 case Bytecodes::_d2f: out->print("[d2f] "); break;
1902 case Bytecodes::_d2i: out->print("[d2i] "); break;
1903 case Bytecodes::_d2l: out->print("[d2l] "); break;
1904 case Bytecodes::_f2d: out->print("[f2d] "); break;
1905 case Bytecodes::_f2i: out->print("[f2i] "); break;
1906 case Bytecodes::_f2l: out->print("[f2l] "); break;
1907 case Bytecodes::_i2b: out->print("[i2b] "); break;
1908 case Bytecodes::_i2c: out->print("[i2c] "); break;
1909 case Bytecodes::_i2d: out->print("[i2d] "); break;
1910 case Bytecodes::_i2f: out->print("[i2f] "); break;
1911 case Bytecodes::_i2l: out->print("[i2l] "); break;
1912 case Bytecodes::_i2s: out->print("[i2s] "); break;
1913 case Bytecodes::_l2i: out->print("[l2i] "); break;
1914 case Bytecodes::_l2f: out->print("[l2f] "); break;
1915 case Bytecodes::_l2d: out->print("[l2d] "); break;
1916 default:
1917 out->print("[?%d]",code);
1918 break;
1919 }
1920 }
1921
1922 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1923 klass()->print(out); out->print(" ");
1924 obj()->print(out); out->print(" ");
1925 tmp1()->print(out); out->print(" ");
1926 tmp2()->print(out); out->print(" ");
1927 tmp3()->print(out); out->print(" ");
1928 tmp4()->print(out); out->print(" ");
1929 out->print("[hdr:%d]", header_size()); out->print(" ");
1930 out->print("[obj:%d]", object_size()); out->print(" ");
1931 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1932 }
1933
1934 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1935 _opr->print(out); out->print(" ");
1936 tmp()->print(out); out->print(" ");
1937 result_opr()->print(out); out->print(" ");
1938 }
1939
1940 // LIR_Op2
1941 void LIR_Op2::print_instr(outputStream* out) const {
1942 if (code() == lir_cmove || code() == lir_cmp) {
1943 print_condition(out, condition()); out->print(" ");
1944 }
1945 in_opr1()->print(out); out->print(" ");
1946 in_opr2()->print(out); out->print(" ");
1947 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); }
1948 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); }
1949 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); }
1950 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); }
1951 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); }
1952 result_opr()->print(out);
1953 }
1954
1955 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1956 klass()->print(out); out->print(" ");
1957 len()->print(out); out->print(" ");
1958 obj()->print(out); out->print(" ");
1959 tmp1()->print(out); out->print(" ");
1960 tmp2()->print(out); out->print(" ");
1961 tmp3()->print(out); out->print(" ");
1962 tmp4()->print(out); out->print(" ");
1963 out->print("[type:0x%x]", type()); out->print(" ");
1964 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1965 }
1966
1967
1968 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1969 object()->print(out); out->print(" ");
1970 if (code() == lir_store_check) {
1971 array()->print(out); out->print(" ");
1972 }
1973 if (code() != lir_store_check) {
1974 klass()->print_name_on(out); out->print(" ");
1975 if (fast_check()) out->print("fast_check ");
1976 }
1977 tmp1()->print(out); out->print(" ");
1978 tmp2()->print(out); out->print(" ");
1979 tmp3()->print(out); out->print(" ");
1980 result_opr()->print(out); out->print(" ");
1981 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
1982 }
1983
1984
1985 // LIR_Op3
1986 void LIR_Op3::print_instr(outputStream* out) const {
1987 in_opr1()->print(out); out->print(" ");
1988 in_opr2()->print(out); out->print(" ");
1989 in_opr3()->print(out); out->print(" ");
1990 result_opr()->print(out);
1991 }
1992
1993
1994 void LIR_OpLock::print_instr(outputStream* out) const {
1995 hdr_opr()->print(out); out->print(" ");
1996 obj_opr()->print(out); out->print(" ");
1997 lock_opr()->print(out); out->print(" ");
1998 if (_scratch->is_valid()) {
1999 _scratch->print(out); out->print(" ");
2000 }
2001 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
2002 }
2003
2004 #ifdef ASSERT
2005 void LIR_OpAssert::print_instr(outputStream* out) const {
2006 print_condition(out, condition()); out->print(" ");
2007 in_opr1()->print(out); out->print(" ");
2008 in_opr2()->print(out); out->print(", \"");
2009 out->print("%s", msg()); out->print("\"");
2010 }
2011 #endif
2012
2013
2014 void LIR_OpDelay::print_instr(outputStream* out) const {
2015 _op->print_on(out);
2016 }
2017
2018
2019 // LIR_OpProfileCall
2020 void LIR_OpProfileCall::print_instr(outputStream* out) const {
2021 profiled_method()->name()->print_symbol_on(out);
2022 out->print(".");
2023 profiled_method()->holder()->name()->print_symbol_on(out);
2024 out->print(" @ %d ", profiled_bci());
2025 mdo()->print(out); out->print(" ");
2026 recv()->print(out); out->print(" ");
2027 tmp1()->print(out); out->print(" ");
2028 }
2029
2030 // LIR_OpProfileType
2031 void LIR_OpProfileType::print_instr(outputStream* out) const {
2032 out->print("exact = ");
2033 if (exact_klass() == NULL) {
2034 out->print("unknown");
2035 } else {
2036 exact_klass()->print_name_on(out);
2037 }
2038 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
2039 out->print(" ");
2040 mdp()->print(out); out->print(" ");
2041 obj()->print(out); out->print(" ");
2042 tmp()->print(out); out->print(" ");
2043 }
2044
2045 #endif // PRODUCT
2046
2047 // Implementation of LIR_InsertionBuffer
2048
2049 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
2050 assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
2051
2052 int i = number_of_insertion_points() - 1;
2053 if (i < 0 || index_at(i) < index) {
2054 append_new(index, 1);
2055 } else {
2056 assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2057 assert(count_at(i) > 0, "check");
2058 set_count_at(i, count_at(i) + 1);
2059 }
2060 _ops.push(op);
2061
2062 DEBUG_ONLY(verify());
2063 }
2064
2065 #ifdef ASSERT
2066 void LIR_InsertionBuffer::verify() {
2067 int sum = 0;
2068 int prev_idx = -1;
2069
2070 for (int i = 0; i < number_of_insertion_points(); i++) {
2071 assert(prev_idx < index_at(i), "index must be ordered ascending");
2072 sum += count_at(i);
2073 }
2074 assert(sum == number_of_ops(), "wrong total sum");
2075 }
2076 #endif