1 /*
2 * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_InstructionPrinter.hpp"
27 #include "c1/c1_LIR.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_ValueStack.hpp"
30 #include "ci/ciInstance.hpp"
31 #include "runtime/sharedRuntime.hpp"
32
33 Register LIR_OprDesc::as_register() const {
34 return FrameMap::cpu_rnr2reg(cpu_regnr());
35 }
36
37 Register LIR_OprDesc::as_register_lo() const {
38 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
39 }
40
41 Register LIR_OprDesc::as_register_hi() const {
42 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
43 }
44
45 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
46
47 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
48 ValueTag tag = type->tag();
49 switch (tag) {
50 case metaDataTag : {
51 ClassConstant* c = type->as_ClassConstant();
52 if (c != NULL && !c->value()->is_loaded()) {
53 return LIR_OprFact::metadataConst(NULL);
54 } else if (c != NULL) {
55 return LIR_OprFact::metadataConst(c->value()->constant_encoding());
56 } else {
57 MethodConstant* m = type->as_MethodConstant();
58 assert (m != NULL, "not a class or a method?");
59 return LIR_OprFact::metadataConst(m->value()->constant_encoding());
60 }
61 }
62 case objectTag : {
63 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
64 }
65 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
66 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
67 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
68 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
69 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
70 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
71 }
72 }
73
74
75 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
76 switch (type->tag()) {
77 case objectTag: return LIR_OprFact::oopConst(NULL);
78 case addressTag:return LIR_OprFact::addressConst(0);
79 case intTag: return LIR_OprFact::intConst(0);
80 case floatTag: return LIR_OprFact::floatConst(0.0);
81 case longTag: return LIR_OprFact::longConst(0);
82 case doubleTag: return LIR_OprFact::doubleConst(0.0);
83 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
84 }
85 return illegalOpr;
86 }
87
88
89
90 //---------------------------------------------------
91
92
93 LIR_Address::Scale LIR_Address::scale(BasicType type) {
94 int elem_size = type2aelembytes(type);
95 switch (elem_size) {
96 case 1: return LIR_Address::times_1;
97 case 2: return LIR_Address::times_2;
98 case 4: return LIR_Address::times_4;
99 case 8: return LIR_Address::times_8;
100 }
101 ShouldNotReachHere();
102 return LIR_Address::times_1;
103 }
104
105 //---------------------------------------------------
106
107 char LIR_OprDesc::type_char(BasicType t) {
108 switch (t) {
109 case T_ARRAY:
110 t = T_OBJECT;
111 case T_BOOLEAN:
112 case T_CHAR:
113 case T_FLOAT:
114 case T_DOUBLE:
115 case T_BYTE:
116 case T_SHORT:
117 case T_INT:
118 case T_LONG:
119 case T_OBJECT:
120 case T_ADDRESS:
121 case T_VOID:
122 return ::type2char(t);
123 case T_METADATA:
124 return 'M';
125 case T_ILLEGAL:
126 return '?';
127
128 default:
129 ShouldNotReachHere();
130 return '?';
131 }
132 }
133
134 #ifndef PRODUCT
135 void LIR_OprDesc::validate_type() const {
136
137 #ifdef ASSERT
138 if (!is_pointer() && !is_illegal()) {
139 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
140 switch (as_BasicType(type_field())) {
141 case T_LONG:
142 assert((kindfield == cpu_register || kindfield == stack_value) &&
143 size_field() == double_size, "must match");
144 break;
145 case T_FLOAT:
146 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
147 assert((kindfield == fpu_register || kindfield == stack_value
148 ARM_ONLY(|| kindfield == cpu_register)
149 PPC32_ONLY(|| kindfield == cpu_register) ) &&
150 size_field() == single_size, "must match");
151 break;
152 case T_DOUBLE:
153 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
154 assert((kindfield == fpu_register || kindfield == stack_value
155 ARM_ONLY(|| kindfield == cpu_register)
156 PPC32_ONLY(|| kindfield == cpu_register) ) &&
157 size_field() == double_size, "must match");
158 break;
159 case T_BOOLEAN:
160 case T_CHAR:
161 case T_BYTE:
162 case T_SHORT:
163 case T_INT:
164 case T_ADDRESS:
165 case T_OBJECT:
166 case T_METADATA:
167 case T_ARRAY:
168 assert((kindfield == cpu_register || kindfield == stack_value) &&
169 size_field() == single_size, "must match");
170 break;
171
172 case T_ILLEGAL:
173 // XXX TKR also means unknown right now
174 // assert(is_illegal(), "must match");
175 break;
176
177 default:
178 ShouldNotReachHere();
179 }
180 }
181 #endif
182
183 }
184 #endif // PRODUCT
185
186
187 bool LIR_OprDesc::is_oop() const {
188 if (is_pointer()) {
189 return pointer()->is_oop_pointer();
190 } else {
191 OprType t= type_field();
192 assert(t != unknown_type, "not set");
193 return t == object_type;
194 }
195 }
196
197
198
199 void LIR_Op2::verify() const {
200 #ifdef ASSERT
201 switch (code()) {
202 case lir_cmove:
203 case lir_xchg:
204 break;
205
206 default:
207 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
208 "can't produce oops from arith");
209 }
210
211 if (TwoOperandLIRForm) {
212
213 #ifdef ASSERT
214 bool threeOperandForm = false;
215 #ifdef S390
216 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
217 threeOperandForm =
218 code() == lir_shl ||
219 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
220 #endif
221 #endif
222
223 switch (code()) {
224 case lir_add:
225 case lir_sub:
226 case lir_mul:
227 case lir_mul_strictfp:
228 case lir_div:
229 case lir_div_strictfp:
230 case lir_rem:
231 case lir_logic_and:
232 case lir_logic_or:
233 case lir_logic_xor:
234 case lir_shl:
235 case lir_shr:
236 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
237 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
238 break;
239
240 // special handling for lir_ushr because of write barriers
241 case lir_ushr:
242 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
243 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
244 break;
245
246 default:
247 break;
248 }
249 }
250 #endif
251 }
252
253
254 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
255 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
256 , _cond(cond)
257 , _type(type)
258 , _label(block->label())
259 , _block(block)
260 , _ublock(NULL)
261 , _stub(NULL) {
262 }
263
264 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
265 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
266 , _cond(cond)
267 , _type(type)
268 , _label(stub->entry())
269 , _block(NULL)
270 , _ublock(NULL)
271 , _stub(stub) {
272 }
273
274 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
275 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
276 , _cond(cond)
277 , _type(type)
278 , _label(block->label())
279 , _block(block)
280 , _ublock(ublock)
281 , _stub(NULL)
282 {
283 }
284
285 void LIR_OpBranch::change_block(BlockBegin* b) {
286 assert(_block != NULL, "must have old block");
287 assert(_block->label() == label(), "must be equal");
288
289 _block = b;
290 _label = b->label();
291 }
292
293 void LIR_OpBranch::change_ublock(BlockBegin* b) {
294 assert(_ublock != NULL, "must have old block");
295 _ublock = b;
296 }
297
298 void LIR_OpBranch::negate_cond() {
299 switch (_cond) {
300 case lir_cond_equal: _cond = lir_cond_notEqual; break;
301 case lir_cond_notEqual: _cond = lir_cond_equal; break;
302 case lir_cond_less: _cond = lir_cond_greaterEqual; break;
303 case lir_cond_lessEqual: _cond = lir_cond_greater; break;
304 case lir_cond_greaterEqual: _cond = lir_cond_less; break;
305 case lir_cond_greater: _cond = lir_cond_lessEqual; break;
306 default: ShouldNotReachHere();
307 }
308 }
309
310
311 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
312 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
313 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
314 CodeStub* stub)
315
316 : LIR_Op(code, result, NULL)
317 , _object(object)
318 , _array(LIR_OprFact::illegalOpr)
319 , _klass(klass)
320 , _tmp1(tmp1)
321 , _tmp2(tmp2)
322 , _tmp3(tmp3)
323 , _fast_check(fast_check)
324 , _stub(stub)
325 , _info_for_patch(info_for_patch)
326 , _info_for_exception(info_for_exception)
327 , _profiled_method(NULL)
328 , _profiled_bci(-1)
329 , _should_profile(false)
330 {
331 if (code == lir_checkcast) {
332 assert(info_for_exception != NULL, "checkcast throws exceptions");
333 } else if (code == lir_instanceof) {
334 assert(info_for_exception == NULL, "instanceof throws no exceptions");
335 } else {
336 ShouldNotReachHere();
337 }
338 }
339
340
341
342 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
343 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
344 , _object(object)
345 , _array(array)
346 , _klass(NULL)
347 , _tmp1(tmp1)
348 , _tmp2(tmp2)
349 , _tmp3(tmp3)
350 , _fast_check(false)
351 , _stub(NULL)
352 , _info_for_patch(NULL)
353 , _info_for_exception(info_for_exception)
354 , _profiled_method(NULL)
355 , _profiled_bci(-1)
356 , _should_profile(false)
357 {
358 if (code == lir_store_check) {
359 _stub = new ArrayStoreExceptionStub(object, info_for_exception);
360 assert(info_for_exception != NULL, "store_check throws exceptions");
361 } else {
362 ShouldNotReachHere();
363 }
364 }
365
366
367 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
368 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
369 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
370 , _tmp(tmp)
371 , _src(src)
372 , _src_pos(src_pos)
373 , _dst(dst)
374 , _dst_pos(dst_pos)
375 , _flags(flags)
376 , _expected_type(expected_type)
377 , _length(length) {
378 _stub = new ArrayCopyStub(this);
379 }
380
381 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
382 : LIR_Op(lir_updatecrc32, res, NULL)
383 , _crc(crc)
384 , _val(val) {
385 }
386
387 //-------------------verify--------------------------
388
389 void LIR_Op1::verify() const {
390 switch(code()) {
391 case lir_move:
392 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
393 break;
394 case lir_null_check:
395 assert(in_opr()->is_register(), "must be");
396 break;
397 case lir_return:
398 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
399 break;
400 default:
401 break;
402 }
403 }
404
405 void LIR_OpRTCall::verify() const {
406 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
407 }
408
409 //-------------------visits--------------------------
410
411 // complete rework of LIR instruction visitor.
412 // The virtual call for each instruction type is replaced by a big
413 // switch that adds the operands for each instruction
414
415 void LIR_OpVisitState::visit(LIR_Op* op) {
416 // copy information from the LIR_Op
417 reset();
418 set_op(op);
419
420 switch (op->code()) {
421
422 // LIR_Op0
423 case lir_word_align: // result and info always invalid
424 case lir_backwardbranch_target: // result and info always invalid
425 case lir_build_frame: // result and info always invalid
426 case lir_fpop_raw: // result and info always invalid
427 case lir_24bit_FPU: // result and info always invalid
428 case lir_reset_FPU: // result and info always invalid
429 case lir_breakpoint: // result and info always invalid
430 case lir_membar: // result and info always invalid
431 case lir_membar_acquire: // result and info always invalid
432 case lir_membar_release: // result and info always invalid
433 case lir_membar_loadload: // result and info always invalid
434 case lir_membar_storestore: // result and info always invalid
435 case lir_membar_loadstore: // result and info always invalid
436 case lir_membar_storeload: // result and info always invalid
437 case lir_on_spin_wait:
438 {
439 assert(op->as_Op0() != NULL, "must be");
440 assert(op->_info == NULL, "info not used by this instruction");
441 assert(op->_result->is_illegal(), "not used");
442 break;
443 }
444
445 case lir_nop: // may have info, result always invalid
446 case lir_std_entry: // may have result, info always invalid
447 case lir_osr_entry: // may have result, info always invalid
448 case lir_get_thread: // may have result, info always invalid
449 case lir_random: //
450 {
451 assert(op->as_Op0() != NULL, "must be");
452 if (op->_info != NULL) do_info(op->_info);
453 if (op->_result->is_valid()) do_output(op->_result);
454 break;
455 }
456
457
458 // LIR_OpLabel
459 case lir_label: // result and info always invalid
460 {
461 assert(op->as_OpLabel() != NULL, "must be");
462 assert(op->_info == NULL, "info not used by this instruction");
463 assert(op->_result->is_illegal(), "not used");
464 break;
465 }
466
467
468 // LIR_Op1
469 case lir_fxch: // input always valid, result and info always invalid
470 case lir_fld: // input always valid, result and info always invalid
471 case lir_ffree: // input always valid, result and info always invalid
472 case lir_push: // input always valid, result and info always invalid
473 case lir_pop: // input always valid, result and info always invalid
474 case lir_return: // input always valid, result and info always invalid
475 case lir_leal: // input and result always valid, info always invalid
476 case lir_neg: // input and result always valid, info always invalid
477 case lir_monaddr: // input and result always valid, info always invalid
478 case lir_null_check: // input and info always valid, result always invalid
479 case lir_move: // input and result always valid, may have info
480 case lir_pack64: // input and result always valid
481 case lir_unpack64: // input and result always valid
482 {
483 assert(op->as_Op1() != NULL, "must be");
484 LIR_Op1* op1 = (LIR_Op1*)op;
485
486 if (op1->_info) do_info(op1->_info);
487 if (op1->_opr->is_valid()) do_input(op1->_opr);
488 if (op1->_result->is_valid()) do_output(op1->_result);
489
490 break;
491 }
492
493 case lir_safepoint:
494 {
495 assert(op->as_Op1() != NULL, "must be");
496 LIR_Op1* op1 = (LIR_Op1*)op;
497
498 assert(op1->_info != NULL, ""); do_info(op1->_info);
499 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
500 assert(op1->_result->is_illegal(), "safepoint does not produce value");
501
502 break;
503 }
504
505 // LIR_OpConvert;
506 case lir_convert: // input and result always valid, info always invalid
507 {
508 assert(op->as_OpConvert() != NULL, "must be");
509 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
510
511 assert(opConvert->_info == NULL, "must be");
512 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
513 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
514 #ifdef PPC32
515 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1);
516 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2);
517 #endif
518 do_stub(opConvert->_stub);
519
520 break;
521 }
522
523 // LIR_OpBranch;
524 case lir_branch: // may have info, input and result register always invalid
525 case lir_cond_float_branch: // may have info, input and result register always invalid
526 {
527 assert(op->as_OpBranch() != NULL, "must be");
528 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
529
530 if (opBranch->_info != NULL) do_info(opBranch->_info);
531 assert(opBranch->_result->is_illegal(), "not used");
532 if (opBranch->_stub != NULL) opBranch->stub()->visit(this);
533
534 break;
535 }
536
537
538 // LIR_OpAllocObj
539 case lir_alloc_object:
540 {
541 assert(op->as_OpAllocObj() != NULL, "must be");
542 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
543
544 if (opAllocObj->_info) do_info(opAllocObj->_info);
545 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
546 do_temp(opAllocObj->_opr);
547 }
548 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
549 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
550 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
551 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
552 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
553 do_stub(opAllocObj->_stub);
554 break;
555 }
556
557
558 // LIR_OpRoundFP;
559 case lir_roundfp: {
560 assert(op->as_OpRoundFP() != NULL, "must be");
561 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
562
563 assert(op->_info == NULL, "info not used by this instruction");
564 assert(opRoundFP->_tmp->is_illegal(), "not used");
565 do_input(opRoundFP->_opr);
566 do_output(opRoundFP->_result);
567
568 break;
569 }
570
571
572 // LIR_Op2
573 case lir_cmp:
574 case lir_cmp_l2i:
575 case lir_ucmp_fd2i:
576 case lir_cmp_fd2i:
577 case lir_add:
578 case lir_sub:
579 case lir_mul:
580 case lir_div:
581 case lir_rem:
582 case lir_sqrt:
583 case lir_abs:
584 case lir_logic_and:
585 case lir_logic_or:
586 case lir_logic_xor:
587 case lir_shl:
588 case lir_shr:
589 case lir_ushr:
590 case lir_xadd:
591 case lir_xchg:
592 case lir_assert:
593 {
594 assert(op->as_Op2() != NULL, "must be");
595 LIR_Op2* op2 = (LIR_Op2*)op;
596 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
597 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
598
599 if (op2->_info) do_info(op2->_info);
600 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
601 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
602 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
603 if (op2->_result->is_valid()) do_output(op2->_result);
604 if (op->code() == lir_xchg || op->code() == lir_xadd) {
605 // on ARM and PPC, return value is loaded first so could
606 // destroy inputs. On other platforms that implement those
607 // (x86, sparc), the extra constrainsts are harmless.
608 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
609 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
610 }
611
612 break;
613 }
614
615 // special handling for cmove: right input operand must not be equal
616 // to the result operand, otherwise the backend fails
617 case lir_cmove:
618 {
619 assert(op->as_Op2() != NULL, "must be");
620 LIR_Op2* op2 = (LIR_Op2*)op;
621
622 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
623 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
624 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
625
626 do_input(op2->_opr1);
627 do_input(op2->_opr2);
628 do_temp(op2->_opr2);
629 do_output(op2->_result);
630
631 break;
632 }
633
634 // vspecial handling for strict operations: register input operands
635 // as temp to guarantee that they do not overlap with other
636 // registers
637 case lir_mul_strictfp:
638 case lir_div_strictfp:
639 {
640 assert(op->as_Op2() != NULL, "must be");
641 LIR_Op2* op2 = (LIR_Op2*)op;
642
643 assert(op2->_info == NULL, "not used");
644 assert(op2->_opr1->is_valid(), "used");
645 assert(op2->_opr2->is_valid(), "used");
646 assert(op2->_result->is_valid(), "used");
647 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
648 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
649
650 do_input(op2->_opr1); do_temp(op2->_opr1);
651 do_input(op2->_opr2); do_temp(op2->_opr2);
652 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
653 do_output(op2->_result);
654
655 break;
656 }
657
658 case lir_throw: {
659 assert(op->as_Op2() != NULL, "must be");
660 LIR_Op2* op2 = (LIR_Op2*)op;
661
662 if (op2->_info) do_info(op2->_info);
663 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
664 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
665 assert(op2->_result->is_illegal(), "no result");
666 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
667 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
668
669 break;
670 }
671
672 case lir_unwind: {
673 assert(op->as_Op1() != NULL, "must be");
674 LIR_Op1* op1 = (LIR_Op1*)op;
675
676 assert(op1->_info == NULL, "no info");
677 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
678 assert(op1->_result->is_illegal(), "no result");
679
680 break;
681 }
682
683 // LIR_Op3
684 case lir_idiv:
685 case lir_irem: {
686 assert(op->as_Op3() != NULL, "must be");
687 LIR_Op3* op3= (LIR_Op3*)op;
688
689 if (op3->_info) do_info(op3->_info);
690 if (op3->_opr1->is_valid()) do_input(op3->_opr1);
691
692 // second operand is input and temp, so ensure that second operand
693 // and third operand get not the same register
694 if (op3->_opr2->is_valid()) do_input(op3->_opr2);
695 if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
696 if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
697
698 if (op3->_result->is_valid()) do_output(op3->_result);
699
700 break;
701 }
702
703 case lir_fmad:
704 case lir_fmaf: {
705 assert(op->as_Op3() != NULL, "must be");
706 LIR_Op3* op3= (LIR_Op3*)op;
707 assert(op3->_info == NULL, "no info");
708 do_input(op3->_opr1);
709 do_input(op3->_opr2);
710 do_input(op3->_opr3);
711 do_output(op3->_result);
712 break;
713 }
714
715 // LIR_OpJavaCall
716 case lir_static_call:
717 case lir_optvirtual_call:
718 case lir_icvirtual_call:
719 case lir_virtual_call:
720 case lir_dynamic_call: {
721 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
722 assert(opJavaCall != NULL, "must be");
723
724 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
725
726 // only visit register parameters
727 int n = opJavaCall->_arguments->length();
728 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
729 if (!opJavaCall->_arguments->at(i)->is_pointer()) {
730 do_input(*opJavaCall->_arguments->adr_at(i));
731 }
732 }
733
734 if (opJavaCall->_info) do_info(opJavaCall->_info);
735 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr &&
736 opJavaCall->is_method_handle_invoke()) {
737 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
738 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
739 }
740 do_call();
741 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
742
743 break;
744 }
745
746
747 // LIR_OpRTCall
748 case lir_rtcall: {
749 assert(op->as_OpRTCall() != NULL, "must be");
750 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
751
752 // only visit register parameters
753 int n = opRTCall->_arguments->length();
754 for (int i = 0; i < n; i++) {
755 if (!opRTCall->_arguments->at(i)->is_pointer()) {
756 do_input(*opRTCall->_arguments->adr_at(i));
757 }
758 }
759 if (opRTCall->_info) do_info(opRTCall->_info);
760 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
761 do_call();
762 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
763
764 break;
765 }
766
767
768 // LIR_OpArrayCopy
769 case lir_arraycopy: {
770 assert(op->as_OpArrayCopy() != NULL, "must be");
771 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
772
773 assert(opArrayCopy->_result->is_illegal(), "unused");
774 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
775 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
776 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
777 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
778 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
779 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
780 if (opArrayCopy->_info) do_info(opArrayCopy->_info);
781
782 // the implementation of arraycopy always has a call into the runtime
783 do_call();
784
785 break;
786 }
787
788
789 // LIR_OpUpdateCRC32
790 case lir_updatecrc32: {
791 assert(op->as_OpUpdateCRC32() != NULL, "must be");
792 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
793
794 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc);
795 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val);
796 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result);
797 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32");
798
799 break;
800 }
801
802
803 // LIR_OpLock
804 case lir_lock:
805 case lir_unlock: {
806 assert(op->as_OpLock() != NULL, "must be");
807 LIR_OpLock* opLock = (LIR_OpLock*)op;
808
809 if (opLock->_info) do_info(opLock->_info);
810
811 // TODO: check if these operands really have to be temp
812 // (or if input is sufficient). This may have influence on the oop map!
813 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
814 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
815 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
816
817 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
818 assert(opLock->_result->is_illegal(), "unused");
819
820 do_stub(opLock->_stub);
821
822 break;
823 }
824
825
826 // LIR_OpDelay
827 case lir_delay_slot: {
828 assert(op->as_OpDelay() != NULL, "must be");
829 LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
830
831 visit(opDelay->delay_op());
832 break;
833 }
834
835 // LIR_OpTypeCheck
836 case lir_instanceof:
837 case lir_checkcast:
838 case lir_store_check: {
839 assert(op->as_OpTypeCheck() != NULL, "must be");
840 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
841
842 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
843 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
844 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
845 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
846 do_temp(opTypeCheck->_object);
847 }
848 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
849 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
850 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
851 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
852 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
853 do_stub(opTypeCheck->_stub);
854 break;
855 }
856
857 // LIR_OpCompareAndSwap
858 case lir_cas_long:
859 case lir_cas_obj:
860 case lir_cas_int: {
861 assert(op->as_OpCompareAndSwap() != NULL, "must be");
862 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
863
864 assert(opCompareAndSwap->_addr->is_valid(), "used");
865 assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
866 assert(opCompareAndSwap->_new_value->is_valid(), "used");
867 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info);
868 do_input(opCompareAndSwap->_addr);
869 do_temp(opCompareAndSwap->_addr);
870 do_input(opCompareAndSwap->_cmp_value);
871 do_temp(opCompareAndSwap->_cmp_value);
872 do_input(opCompareAndSwap->_new_value);
873 do_temp(opCompareAndSwap->_new_value);
874 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1);
875 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2);
876 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result);
877
878 break;
879 }
880
881
882 // LIR_OpAllocArray;
883 case lir_alloc_array: {
884 assert(op->as_OpAllocArray() != NULL, "must be");
885 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
886
887 if (opAllocArray->_info) do_info(opAllocArray->_info);
888 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
889 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len);
890 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
891 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
892 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
893 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
894 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
895 do_stub(opAllocArray->_stub);
896 break;
897 }
898
899 // LIR_OpProfileCall:
900 case lir_profile_call: {
901 assert(op->as_OpProfileCall() != NULL, "must be");
902 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
903
904 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
905 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
906 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
907 break;
908 }
909
910 // LIR_OpProfileType:
911 case lir_profile_type: {
912 assert(op->as_OpProfileType() != NULL, "must be");
913 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
914
915 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
916 do_input(opProfileType->_obj);
917 do_temp(opProfileType->_tmp);
918 break;
919 }
920 default:
921 op->visit(this);
922 }
923 }
924
925 void LIR_Op::visit(LIR_OpVisitState* state) {
926 ShouldNotReachHere();
927 }
928
929 void LIR_OpVisitState::do_stub(CodeStub* stub) {
930 if (stub != NULL) {
931 stub->visit(this);
932 }
933 }
934
935 XHandlers* LIR_OpVisitState::all_xhandler() {
936 XHandlers* result = NULL;
937
938 int i;
939 for (i = 0; i < info_count(); i++) {
940 if (info_at(i)->exception_handlers() != NULL) {
941 result = info_at(i)->exception_handlers();
942 break;
943 }
944 }
945
946 #ifdef ASSERT
947 for (i = 0; i < info_count(); i++) {
948 assert(info_at(i)->exception_handlers() == NULL ||
949 info_at(i)->exception_handlers() == result,
950 "only one xhandler list allowed per LIR-operation");
951 }
952 #endif
953
954 if (result != NULL) {
955 return result;
956 } else {
957 return new XHandlers();
958 }
959
960 return result;
961 }
962
963
964 #ifdef ASSERT
965 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
966 visit(op);
967
968 return opr_count(inputMode) == 0 &&
969 opr_count(outputMode) == 0 &&
970 opr_count(tempMode) == 0 &&
971 info_count() == 0 &&
972 !has_call() &&
973 !has_slow_case();
974 }
975 #endif
976
977 //---------------------------------------------------
978
979
980 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
981 masm->emit_call(this);
982 }
983
984 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
985 masm->emit_rtcall(this);
986 }
987
988 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
989 masm->emit_opLabel(this);
990 }
991
992 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
993 masm->emit_arraycopy(this);
994 masm->append_code_stub(stub());
995 }
996
997 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
998 masm->emit_updatecrc32(this);
999 }
1000
1001 void LIR_Op0::emit_code(LIR_Assembler* masm) {
1002 masm->emit_op0(this);
1003 }
1004
1005 void LIR_Op1::emit_code(LIR_Assembler* masm) {
1006 masm->emit_op1(this);
1007 }
1008
1009 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
1010 masm->emit_alloc_obj(this);
1011 masm->append_code_stub(stub());
1012 }
1013
1014 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
1015 masm->emit_opBranch(this);
1016 if (stub()) {
1017 masm->append_code_stub(stub());
1018 }
1019 }
1020
1021 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
1022 masm->emit_opConvert(this);
1023 if (stub() != NULL) {
1024 masm->append_code_stub(stub());
1025 }
1026 }
1027
1028 void LIR_Op2::emit_code(LIR_Assembler* masm) {
1029 masm->emit_op2(this);
1030 }
1031
1032 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1033 masm->emit_alloc_array(this);
1034 masm->append_code_stub(stub());
1035 }
1036
1037 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1038 masm->emit_opTypeCheck(this);
1039 if (stub()) {
1040 masm->append_code_stub(stub());
1041 }
1042 }
1043
1044 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1045 masm->emit_compare_and_swap(this);
1046 }
1047
1048 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1049 masm->emit_op3(this);
1050 }
1051
1052 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1053 masm->emit_lock(this);
1054 if (stub()) {
1055 masm->append_code_stub(stub());
1056 }
1057 }
1058
1059 #ifdef ASSERT
1060 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1061 masm->emit_assert(this);
1062 }
1063 #endif
1064
1065 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1066 masm->emit_delay(this);
1067 }
1068
1069 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1070 masm->emit_profile_call(this);
1071 }
1072
1073 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1074 masm->emit_profile_type(this);
1075 }
1076
1077 // LIR_List
1078 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1079 : _operations(8)
1080 , _compilation(compilation)
1081 #ifndef PRODUCT
1082 , _block(block)
1083 #endif
1084 #ifdef ASSERT
1085 , _file(NULL)
1086 , _line(0)
1087 #endif
1088 { }
1089
1090
1091 #ifdef ASSERT
1092 void LIR_List::set_file_and_line(const char * file, int line) {
1093 const char * f = strrchr(file, '/');
1094 if (f == NULL) f = strrchr(file, '\\');
1095 if (f == NULL) {
1096 f = file;
1097 } else {
1098 f++;
1099 }
1100 _file = f;
1101 _line = line;
1102 }
1103 #endif
1104
1105
1106 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1107 assert(this == buffer->lir_list(), "wrong lir list");
1108 const int n = _operations.length();
1109
1110 if (buffer->number_of_ops() > 0) {
1111 // increase size of instructions list
1112 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1113 // insert ops from buffer into instructions list
1114 int op_index = buffer->number_of_ops() - 1;
1115 int ip_index = buffer->number_of_insertion_points() - 1;
1116 int from_index = n - 1;
1117 int to_index = _operations.length() - 1;
1118 for (; ip_index >= 0; ip_index --) {
1119 int index = buffer->index_at(ip_index);
1120 // make room after insertion point
1121 while (index < from_index) {
1122 _operations.at_put(to_index --, _operations.at(from_index --));
1123 }
1124 // insert ops from buffer
1125 for (int i = buffer->count_at(ip_index); i > 0; i --) {
1126 _operations.at_put(to_index --, buffer->op_at(op_index --));
1127 }
1128 }
1129 }
1130
1131 buffer->finish();
1132 }
1133
1134
1135 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1136 assert(reg->type() == T_OBJECT, "bad reg");
1137 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
1138 }
1139
1140 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1141 assert(reg->type() == T_METADATA, "bad reg");
1142 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1143 }
1144
1145 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1146 append(new LIR_Op1(
1147 lir_move,
1148 LIR_OprFact::address(addr),
1149 src,
1150 addr->type(),
1151 patch_code,
1152 info));
1153 }
1154
1155
1156 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1157 append(new LIR_Op1(
1158 lir_move,
1159 LIR_OprFact::address(address),
1160 dst,
1161 address->type(),
1162 patch_code,
1163 info, lir_move_volatile));
1164 }
1165
1166 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1167 append(new LIR_Op1(
1168 lir_move,
1169 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1170 dst,
1171 type,
1172 patch_code,
1173 info, lir_move_volatile));
1174 }
1175
1176
1177 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1178 append(new LIR_Op1(
1179 lir_move,
1180 LIR_OprFact::intConst(v),
1181 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1182 type,
1183 patch_code,
1184 info));
1185 }
1186
1187
1188 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1189 append(new LIR_Op1(
1190 lir_move,
1191 LIR_OprFact::oopConst(o),
1192 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1193 type,
1194 patch_code,
1195 info));
1196 }
1197
1198
1199 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1200 append(new LIR_Op1(
1201 lir_move,
1202 src,
1203 LIR_OprFact::address(addr),
1204 addr->type(),
1205 patch_code,
1206 info));
1207 }
1208
1209
1210 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1211 append(new LIR_Op1(
1212 lir_move,
1213 src,
1214 LIR_OprFact::address(addr),
1215 addr->type(),
1216 patch_code,
1217 info,
1218 lir_move_volatile));
1219 }
1220
1221 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1222 append(new LIR_Op1(
1223 lir_move,
1224 src,
1225 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1226 type,
1227 patch_code,
1228 info, lir_move_volatile));
1229 }
1230
1231
1232 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1233 append(new LIR_Op3(
1234 lir_idiv,
1235 left,
1236 right,
1237 tmp,
1238 res,
1239 info));
1240 }
1241
1242
1243 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1244 append(new LIR_Op3(
1245 lir_idiv,
1246 left,
1247 LIR_OprFact::intConst(right),
1248 tmp,
1249 res,
1250 info));
1251 }
1252
1253
1254 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1255 append(new LIR_Op3(
1256 lir_irem,
1257 left,
1258 right,
1259 tmp,
1260 res,
1261 info));
1262 }
1263
1264
1265 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1266 append(new LIR_Op3(
1267 lir_irem,
1268 left,
1269 LIR_OprFact::intConst(right),
1270 tmp,
1271 res,
1272 info));
1273 }
1274
1275
1276 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1277 append(new LIR_Op2(
1278 lir_cmp,
1279 condition,
1280 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1281 LIR_OprFact::intConst(c),
1282 info));
1283 }
1284
1285
1286 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1287 append(new LIR_Op2(
1288 lir_cmp,
1289 condition,
1290 reg,
1291 LIR_OprFact::address(addr),
1292 info));
1293 }
1294
1295 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1296 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1297 append(new LIR_OpAllocObj(
1298 klass,
1299 dst,
1300 t1,
1301 t2,
1302 t3,
1303 t4,
1304 header_size,
1305 object_size,
1306 init_check,
1307 stub));
1308 }
1309
1310 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1311 append(new LIR_OpAllocArray(
1312 klass,
1313 len,
1314 dst,
1315 t1,
1316 t2,
1317 t3,
1318 t4,
1319 type,
1320 stub));
1321 }
1322
1323 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1324 append(new LIR_Op2(
1325 lir_shl,
1326 value,
1327 count,
1328 dst,
1329 tmp));
1330 }
1331
1332 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1333 append(new LIR_Op2(
1334 lir_shr,
1335 value,
1336 count,
1337 dst,
1338 tmp));
1339 }
1340
1341
1342 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1343 append(new LIR_Op2(
1344 lir_ushr,
1345 value,
1346 count,
1347 dst,
1348 tmp));
1349 }
1350
1351 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1352 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1353 left,
1354 right,
1355 dst));
1356 }
1357
1358 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1359 append(new LIR_OpLock(
1360 lir_lock,
1361 hdr,
1362 obj,
1363 lock,
1364 scratch,
1365 stub,
1366 info));
1367 }
1368
1369 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1370 append(new LIR_OpLock(
1371 lir_unlock,
1372 hdr,
1373 obj,
1374 lock,
1375 scratch,
1376 stub,
1377 NULL));
1378 }
1379
1380
1381 void check_LIR() {
1382 // cannot do the proper checking as PRODUCT and other modes return different results
1383 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
1384 }
1385
1386
1387
1388 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1389 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1390 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1391 ciMethod* profiled_method, int profiled_bci) {
1392 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1393 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1394 if (profiled_method != NULL) {
1395 c->set_profiled_method(profiled_method);
1396 c->set_profiled_bci(profiled_bci);
1397 c->set_should_profile(true);
1398 }
1399 append(c);
1400 }
1401
1402 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1403 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
1404 if (profiled_method != NULL) {
1405 c->set_profiled_method(profiled_method);
1406 c->set_profiled_bci(profiled_bci);
1407 c->set_should_profile(true);
1408 }
1409 append(c);
1410 }
1411
1412
1413 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1414 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1415 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1416 if (profiled_method != NULL) {
1417 c->set_profiled_method(profiled_method);
1418 c->set_profiled_bci(profiled_bci);
1419 c->set_should_profile(true);
1420 }
1421 append(c);
1422 }
1423
1424 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) {
1425 if (deoptimize_on_null) {
1426 // Emit an explicit null check and deoptimize if opr is null
1427 CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none);
1428 cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL));
1429 branch(lir_cond_equal, T_OBJECT, deopt);
1430 } else {
1431 // Emit an implicit null check
1432 append(new LIR_Op1(lir_null_check, opr, info));
1433 }
1434 }
1435
1436 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1437 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1438 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1439 }
1440
1441 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1442 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1443 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1444 }
1445
1446 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1447 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1448 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1449 }
1450
1451
1452 #ifdef PRODUCT
1453
1454 void print_LIR(BlockList* blocks) {
1455 }
1456
1457 #else
1458 // LIR_OprDesc
1459 void LIR_OprDesc::print() const {
1460 print(tty);
1461 }
1462
1463 void LIR_OprDesc::print(outputStream* out) const {
1464 if (is_illegal()) {
1465 return;
1466 }
1467
1468 out->print("[");
1469 if (is_pointer()) {
1470 pointer()->print_value_on(out);
1471 } else if (is_single_stack()) {
1472 out->print("stack:%d", single_stack_ix());
1473 } else if (is_double_stack()) {
1474 out->print("dbl_stack:%d",double_stack_ix());
1475 } else if (is_virtual()) {
1476 out->print("R%d", vreg_number());
1477 } else if (is_single_cpu()) {
1478 out->print("%s", as_register()->name());
1479 } else if (is_double_cpu()) {
1480 out->print("%s", as_register_hi()->name());
1481 out->print("%s", as_register_lo()->name());
1482 #if defined(X86)
1483 } else if (is_single_xmm()) {
1484 out->print("%s", as_xmm_float_reg()->name());
1485 } else if (is_double_xmm()) {
1486 out->print("%s", as_xmm_double_reg()->name());
1487 } else if (is_single_fpu()) {
1488 out->print("fpu%d", fpu_regnr());
1489 } else if (is_double_fpu()) {
1490 out->print("fpu%d", fpu_regnrLo());
1491 #elif defined(AARCH64)
1492 } else if (is_single_fpu()) {
1493 out->print("fpu%d", fpu_regnr());
1494 } else if (is_double_fpu()) {
1495 out->print("fpu%d", fpu_regnrLo());
1496 #elif defined(ARM)
1497 } else if (is_single_fpu()) {
1498 out->print("s%d", fpu_regnr());
1499 } else if (is_double_fpu()) {
1500 out->print("d%d", fpu_regnrLo() >> 1);
1501 #else
1502 } else if (is_single_fpu()) {
1503 out->print("%s", as_float_reg()->name());
1504 } else if (is_double_fpu()) {
1505 out->print("%s", as_double_reg()->name());
1506 #endif
1507
1508 } else if (is_illegal()) {
1509 out->print("-");
1510 } else {
1511 out->print("Unknown Operand");
1512 }
1513 if (!is_illegal()) {
1514 out->print("|%c", type_char());
1515 }
1516 if (is_register() && is_last_use()) {
1517 out->print("(last_use)");
1518 }
1519 out->print("]");
1520 }
1521
1522
1523 // LIR_Address
1524 void LIR_Const::print_value_on(outputStream* out) const {
1525 switch (type()) {
1526 case T_ADDRESS:out->print("address:%d",as_jint()); break;
1527 case T_INT: out->print("int:%d", as_jint()); break;
1528 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1529 case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
1530 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
1531 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break;
1532 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
1533 default: out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1534 }
1535 }
1536
1537 // LIR_Address
1538 void LIR_Address::print_value_on(outputStream* out) const {
1539 out->print("Base:"); _base->print(out);
1540 if (!_index->is_illegal()) {
1541 out->print(" Index:"); _index->print(out);
1542 switch (scale()) {
1543 case times_1: break;
1544 case times_2: out->print(" * 2"); break;
1545 case times_4: out->print(" * 4"); break;
1546 case times_8: out->print(" * 8"); break;
1547 }
1548 }
1549 out->print(" Disp: " INTX_FORMAT, _disp);
1550 }
1551
1552 // debug output of block header without InstructionPrinter
1553 // (because phi functions are not necessary for LIR)
1554 static void print_block(BlockBegin* x) {
1555 // print block id
1556 BlockEnd* end = x->end();
1557 tty->print("B%d ", x->block_id());
1558
1559 // print flags
1560 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
1561 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
1562 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
1563 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
1564 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
1565 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1566 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
1567
1568 // print block bci range
1569 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
1570
1571 // print predecessors and successors
1572 if (x->number_of_preds() > 0) {
1573 tty->print("preds: ");
1574 for (int i = 0; i < x->number_of_preds(); i ++) {
1575 tty->print("B%d ", x->pred_at(i)->block_id());
1576 }
1577 }
1578
1579 if (x->number_of_sux() > 0) {
1580 tty->print("sux: ");
1581 for (int i = 0; i < x->number_of_sux(); i ++) {
1582 tty->print("B%d ", x->sux_at(i)->block_id());
1583 }
1584 }
1585
1586 // print exception handlers
1587 if (x->number_of_exception_handlers() > 0) {
1588 tty->print("xhandler: ");
1589 for (int i = 0; i < x->number_of_exception_handlers(); i++) {
1590 tty->print("B%d ", x->exception_handler_at(i)->block_id());
1591 }
1592 }
1593
1594 tty->cr();
1595 }
1596
1597 void print_LIR(BlockList* blocks) {
1598 tty->print_cr("LIR:");
1599 int i;
1600 for (i = 0; i < blocks->length(); i++) {
1601 BlockBegin* bb = blocks->at(i);
1602 print_block(bb);
1603 tty->print("__id_Instruction___________________________________________"); tty->cr();
1604 bb->lir()->print_instructions();
1605 }
1606 }
1607
1608 void LIR_List::print_instructions() {
1609 for (int i = 0; i < _operations.length(); i++) {
1610 _operations.at(i)->print(); tty->cr();
1611 }
1612 tty->cr();
1613 }
1614
1615 // LIR_Ops printing routines
1616 // LIR_Op
1617 void LIR_Op::print_on(outputStream* out) const {
1618 if (id() != -1 || PrintCFGToFile) {
1619 out->print("%4d ", id());
1620 } else {
1621 out->print(" ");
1622 }
1623 out->print("%s ", name());
1624 print_instr(out);
1625 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
1626 #ifdef ASSERT
1627 if (Verbose && _file != NULL) {
1628 out->print(" (%s:%d)", _file, _line);
1629 }
1630 #endif
1631 }
1632
1633 const char * LIR_Op::name() const {
1634 const char* s = NULL;
1635 switch(code()) {
1636 // LIR_Op0
1637 case lir_membar: s = "membar"; break;
1638 case lir_membar_acquire: s = "membar_acquire"; break;
1639 case lir_membar_release: s = "membar_release"; break;
1640 case lir_membar_loadload: s = "membar_loadload"; break;
1641 case lir_membar_storestore: s = "membar_storestore"; break;
1642 case lir_membar_loadstore: s = "membar_loadstore"; break;
1643 case lir_membar_storeload: s = "membar_storeload"; break;
1644 case lir_word_align: s = "word_align"; break;
1645 case lir_label: s = "label"; break;
1646 case lir_nop: s = "nop"; break;
1647 case lir_on_spin_wait: s = "on_spin_wait"; break;
1648 case lir_backwardbranch_target: s = "backbranch"; break;
1649 case lir_std_entry: s = "std_entry"; break;
1650 case lir_osr_entry: s = "osr_entry"; break;
1651 case lir_build_frame: s = "build_frm"; break;
1652 case lir_fpop_raw: s = "fpop_raw"; break;
1653 case lir_24bit_FPU: s = "24bit_FPU"; break;
1654 case lir_reset_FPU: s = "reset_FPU"; break;
1655 case lir_breakpoint: s = "breakpoint"; break;
1656 case lir_get_thread: s = "get_thread"; break;
1657 // LIR_Op1
1658 case lir_fxch: s = "fxch"; break;
1659 case lir_fld: s = "fld"; break;
1660 case lir_ffree: s = "ffree"; break;
1661 case lir_push: s = "push"; break;
1662 case lir_pop: s = "pop"; break;
1663 case lir_null_check: s = "null_check"; break;
1664 case lir_return: s = "return"; break;
1665 case lir_safepoint: s = "safepoint"; break;
1666 case lir_neg: s = "neg"; break;
1667 case lir_leal: s = "leal"; break;
1668 case lir_branch: s = "branch"; break;
1669 case lir_cond_float_branch: s = "flt_cond_br"; break;
1670 case lir_move: s = "move"; break;
1671 case lir_roundfp: s = "roundfp"; break;
1672 case lir_rtcall: s = "rtcall"; break;
1673 case lir_throw: s = "throw"; break;
1674 case lir_unwind: s = "unwind"; break;
1675 case lir_convert: s = "convert"; break;
1676 case lir_alloc_object: s = "alloc_obj"; break;
1677 case lir_monaddr: s = "mon_addr"; break;
1678 case lir_pack64: s = "pack64"; break;
1679 case lir_unpack64: s = "unpack64"; break;
1680 case lir_random: s = "random"; break;
1681 // LIR_Op2
1682 case lir_cmp: s = "cmp"; break;
1683 case lir_cmp_l2i: s = "cmp_l2i"; break;
1684 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1685 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1686 case lir_cmove: s = "cmove"; break;
1687 case lir_add: s = "add"; break;
1688 case lir_sub: s = "sub"; break;
1689 case lir_mul: s = "mul"; break;
1690 case lir_mul_strictfp: s = "mul_strictfp"; break;
1691 case lir_div: s = "div"; break;
1692 case lir_div_strictfp: s = "div_strictfp"; break;
1693 case lir_rem: s = "rem"; break;
1694 case lir_abs: s = "abs"; break;
1695 case lir_sqrt: s = "sqrt"; break;
1696 case lir_logic_and: s = "logic_and"; break;
1697 case lir_logic_or: s = "logic_or"; break;
1698 case lir_logic_xor: s = "logic_xor"; break;
1699 case lir_shl: s = "shift_left"; break;
1700 case lir_shr: s = "shift_right"; break;
1701 case lir_ushr: s = "ushift_right"; break;
1702 case lir_alloc_array: s = "alloc_array"; break;
1703 case lir_xadd: s = "xadd"; break;
1704 case lir_xchg: s = "xchg"; break;
1705 // LIR_Op3
1706 case lir_idiv: s = "idiv"; break;
1707 case lir_irem: s = "irem"; break;
1708 case lir_fmad: s = "fmad"; break;
1709 case lir_fmaf: s = "fmaf"; break;
1710 // LIR_OpJavaCall
1711 case lir_static_call: s = "static"; break;
1712 case lir_optvirtual_call: s = "optvirtual"; break;
1713 case lir_icvirtual_call: s = "icvirtual"; break;
1714 case lir_virtual_call: s = "virtual"; break;
1715 case lir_dynamic_call: s = "dynamic"; break;
1716 // LIR_OpArrayCopy
1717 case lir_arraycopy: s = "arraycopy"; break;
1718 // LIR_OpUpdateCRC32
1719 case lir_updatecrc32: s = "updatecrc32"; break;
1720 // LIR_OpLock
1721 case lir_lock: s = "lock"; break;
1722 case lir_unlock: s = "unlock"; break;
1723 // LIR_OpDelay
1724 case lir_delay_slot: s = "delay"; break;
1725 // LIR_OpTypeCheck
1726 case lir_instanceof: s = "instanceof"; break;
1727 case lir_checkcast: s = "checkcast"; break;
1728 case lir_store_check: s = "store_check"; break;
1729 // LIR_OpCompareAndSwap
1730 case lir_cas_long: s = "cas_long"; break;
1731 case lir_cas_obj: s = "cas_obj"; break;
1732 case lir_cas_int: s = "cas_int"; break;
1733 // LIR_OpProfileCall
1734 case lir_profile_call: s = "profile_call"; break;
1735 // LIR_OpProfileType
1736 case lir_profile_type: s = "profile_type"; break;
1737 // LIR_OpAssert
1738 #ifdef ASSERT
1739 case lir_assert: s = "assert"; break;
1740 #endif
1741 case lir_none: ShouldNotReachHere();break;
1742 default: s = "illegal_op"; break;
1743 }
1744 return s;
1745 }
1746
1747 // LIR_OpJavaCall
1748 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1749 out->print("call: ");
1750 out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1751 if (receiver()->is_valid()) {
1752 out->print(" [recv: "); receiver()->print(out); out->print("]");
1753 }
1754 if (result_opr()->is_valid()) {
1755 out->print(" [result: "); result_opr()->print(out); out->print("]");
1756 }
1757 }
1758
1759 // LIR_OpLabel
1760 void LIR_OpLabel::print_instr(outputStream* out) const {
1761 out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1762 }
1763
1764 // LIR_OpArrayCopy
1765 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1766 src()->print(out); out->print(" ");
1767 src_pos()->print(out); out->print(" ");
1768 dst()->print(out); out->print(" ");
1769 dst_pos()->print(out); out->print(" ");
1770 length()->print(out); out->print(" ");
1771 tmp()->print(out); out->print(" ");
1772 }
1773
1774 // LIR_OpUpdateCRC32
1775 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1776 crc()->print(out); out->print(" ");
1777 val()->print(out); out->print(" ");
1778 result_opr()->print(out); out->print(" ");
1779 }
1780
1781 // LIR_OpCompareAndSwap
1782 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1783 addr()->print(out); out->print(" ");
1784 cmp_value()->print(out); out->print(" ");
1785 new_value()->print(out); out->print(" ");
1786 tmp1()->print(out); out->print(" ");
1787 tmp2()->print(out); out->print(" ");
1788
1789 }
1790
1791 // LIR_Op0
1792 void LIR_Op0::print_instr(outputStream* out) const {
1793 result_opr()->print(out);
1794 }
1795
1796 // LIR_Op1
1797 const char * LIR_Op1::name() const {
1798 if (code() == lir_move) {
1799 switch (move_kind()) {
1800 case lir_move_normal:
1801 return "move";
1802 case lir_move_unaligned:
1803 return "unaligned move";
1804 case lir_move_volatile:
1805 return "volatile_move";
1806 case lir_move_wide:
1807 return "wide_move";
1808 default:
1809 ShouldNotReachHere();
1810 return "illegal_op";
1811 }
1812 } else {
1813 return LIR_Op::name();
1814 }
1815 }
1816
1817
1818 void LIR_Op1::print_instr(outputStream* out) const {
1819 _opr->print(out); out->print(" ");
1820 result_opr()->print(out); out->print(" ");
1821 print_patch_code(out, patch_code());
1822 }
1823
1824
1825 // LIR_Op1
1826 void LIR_OpRTCall::print_instr(outputStream* out) const {
1827 intx a = (intx)addr();
1828 out->print("%s", Runtime1::name_for_address(addr()));
1829 out->print(" ");
1830 tmp()->print(out);
1831 }
1832
1833 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1834 switch(code) {
1835 case lir_patch_none: break;
1836 case lir_patch_low: out->print("[patch_low]"); break;
1837 case lir_patch_high: out->print("[patch_high]"); break;
1838 case lir_patch_normal: out->print("[patch_normal]"); break;
1839 default: ShouldNotReachHere();
1840 }
1841 }
1842
1843 // LIR_OpBranch
1844 void LIR_OpBranch::print_instr(outputStream* out) const {
1845 print_condition(out, cond()); out->print(" ");
1846 if (block() != NULL) {
1847 out->print("[B%d] ", block()->block_id());
1848 } else if (stub() != NULL) {
1849 out->print("[");
1850 stub()->print_name(out);
1851 out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1852 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1853 } else {
1854 out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1855 }
1856 if (ublock() != NULL) {
1857 out->print("unordered: [B%d] ", ublock()->block_id());
1858 }
1859 }
1860
1861 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1862 switch(cond) {
1863 case lir_cond_equal: out->print("[EQ]"); break;
1864 case lir_cond_notEqual: out->print("[NE]"); break;
1865 case lir_cond_less: out->print("[LT]"); break;
1866 case lir_cond_lessEqual: out->print("[LE]"); break;
1867 case lir_cond_greaterEqual: out->print("[GE]"); break;
1868 case lir_cond_greater: out->print("[GT]"); break;
1869 case lir_cond_belowEqual: out->print("[BE]"); break;
1870 case lir_cond_aboveEqual: out->print("[AE]"); break;
1871 case lir_cond_always: out->print("[AL]"); break;
1872 default: out->print("[%d]",cond); break;
1873 }
1874 }
1875
1876 // LIR_OpConvert
1877 void LIR_OpConvert::print_instr(outputStream* out) const {
1878 print_bytecode(out, bytecode());
1879 in_opr()->print(out); out->print(" ");
1880 result_opr()->print(out); out->print(" ");
1881 #ifdef PPC32
1882 if(tmp1()->is_valid()) {
1883 tmp1()->print(out); out->print(" ");
1884 tmp2()->print(out); out->print(" ");
1885 }
1886 #endif
1887 }
1888
1889 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1890 switch(code) {
1891 case Bytecodes::_d2f: out->print("[d2f] "); break;
1892 case Bytecodes::_d2i: out->print("[d2i] "); break;
1893 case Bytecodes::_d2l: out->print("[d2l] "); break;
1894 case Bytecodes::_f2d: out->print("[f2d] "); break;
1895 case Bytecodes::_f2i: out->print("[f2i] "); break;
1896 case Bytecodes::_f2l: out->print("[f2l] "); break;
1897 case Bytecodes::_i2b: out->print("[i2b] "); break;
1898 case Bytecodes::_i2c: out->print("[i2c] "); break;
1899 case Bytecodes::_i2d: out->print("[i2d] "); break;
1900 case Bytecodes::_i2f: out->print("[i2f] "); break;
1901 case Bytecodes::_i2l: out->print("[i2l] "); break;
1902 case Bytecodes::_i2s: out->print("[i2s] "); break;
1903 case Bytecodes::_l2i: out->print("[l2i] "); break;
1904 case Bytecodes::_l2f: out->print("[l2f] "); break;
1905 case Bytecodes::_l2d: out->print("[l2d] "); break;
1906 default:
1907 out->print("[?%d]",code);
1908 break;
1909 }
1910 }
1911
1912 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1913 klass()->print(out); out->print(" ");
1914 obj()->print(out); out->print(" ");
1915 tmp1()->print(out); out->print(" ");
1916 tmp2()->print(out); out->print(" ");
1917 tmp3()->print(out); out->print(" ");
1918 tmp4()->print(out); out->print(" ");
1919 out->print("[hdr:%d]", header_size()); out->print(" ");
1920 out->print("[obj:%d]", object_size()); out->print(" ");
1921 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1922 }
1923
1924 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1925 _opr->print(out); out->print(" ");
1926 tmp()->print(out); out->print(" ");
1927 result_opr()->print(out); out->print(" ");
1928 }
1929
1930 // LIR_Op2
1931 void LIR_Op2::print_instr(outputStream* out) const {
1932 if (code() == lir_cmove || code() == lir_cmp) {
1933 print_condition(out, condition()); out->print(" ");
1934 }
1935 in_opr1()->print(out); out->print(" ");
1936 in_opr2()->print(out); out->print(" ");
1937 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); }
1938 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); }
1939 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); }
1940 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); }
1941 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); }
1942 result_opr()->print(out);
1943 }
1944
1945 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1946 klass()->print(out); out->print(" ");
1947 len()->print(out); out->print(" ");
1948 obj()->print(out); out->print(" ");
1949 tmp1()->print(out); out->print(" ");
1950 tmp2()->print(out); out->print(" ");
1951 tmp3()->print(out); out->print(" ");
1952 tmp4()->print(out); out->print(" ");
1953 out->print("[type:0x%x]", type()); out->print(" ");
1954 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1955 }
1956
1957
1958 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1959 object()->print(out); out->print(" ");
1960 if (code() == lir_store_check) {
1961 array()->print(out); out->print(" ");
1962 }
1963 if (code() != lir_store_check) {
1964 klass()->print_name_on(out); out->print(" ");
1965 if (fast_check()) out->print("fast_check ");
1966 }
1967 tmp1()->print(out); out->print(" ");
1968 tmp2()->print(out); out->print(" ");
1969 tmp3()->print(out); out->print(" ");
1970 result_opr()->print(out); out->print(" ");
1971 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
1972 }
1973
1974
1975 // LIR_Op3
1976 void LIR_Op3::print_instr(outputStream* out) const {
1977 in_opr1()->print(out); out->print(" ");
1978 in_opr2()->print(out); out->print(" ");
1979 in_opr3()->print(out); out->print(" ");
1980 result_opr()->print(out);
1981 }
1982
1983
1984 void LIR_OpLock::print_instr(outputStream* out) const {
1985 hdr_opr()->print(out); out->print(" ");
1986 obj_opr()->print(out); out->print(" ");
1987 lock_opr()->print(out); out->print(" ");
1988 if (_scratch->is_valid()) {
1989 _scratch->print(out); out->print(" ");
1990 }
1991 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1992 }
1993
1994 #ifdef ASSERT
1995 void LIR_OpAssert::print_instr(outputStream* out) const {
1996 print_condition(out, condition()); out->print(" ");
1997 in_opr1()->print(out); out->print(" ");
1998 in_opr2()->print(out); out->print(", \"");
1999 out->print("%s", msg()); out->print("\"");
2000 }
2001 #endif
2002
2003
2004 void LIR_OpDelay::print_instr(outputStream* out) const {
2005 _op->print_on(out);
2006 }
2007
2008
2009 // LIR_OpProfileCall
2010 void LIR_OpProfileCall::print_instr(outputStream* out) const {
2011 profiled_method()->name()->print_symbol_on(out);
2012 out->print(".");
2013 profiled_method()->holder()->name()->print_symbol_on(out);
2014 out->print(" @ %d ", profiled_bci());
2015 mdo()->print(out); out->print(" ");
2016 recv()->print(out); out->print(" ");
2017 tmp1()->print(out); out->print(" ");
2018 }
2019
2020 // LIR_OpProfileType
2021 void LIR_OpProfileType::print_instr(outputStream* out) const {
2022 out->print("exact = ");
2023 if (exact_klass() == NULL) {
2024 out->print("unknown");
2025 } else {
2026 exact_klass()->print_name_on(out);
2027 }
2028 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
2029 out->print(" ");
2030 mdp()->print(out); out->print(" ");
2031 obj()->print(out); out->print(" ");
2032 tmp()->print(out); out->print(" ");
2033 }
2034
2035 #endif // PRODUCT
2036
2037 // Implementation of LIR_InsertionBuffer
2038
2039 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
2040 assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
2041
2042 int i = number_of_insertion_points() - 1;
2043 if (i < 0 || index_at(i) < index) {
2044 append_new(index, 1);
2045 } else {
2046 assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2047 assert(count_at(i) > 0, "check");
2048 set_count_at(i, count_at(i) + 1);
2049 }
2050 _ops.push(op);
2051
2052 DEBUG_ONLY(verify());
2053 }
2054
2055 #ifdef ASSERT
2056 void LIR_InsertionBuffer::verify() {
2057 int sum = 0;
2058 int prev_idx = -1;
2059
2060 for (int i = 0; i < number_of_insertion_points(); i++) {
2061 assert(prev_idx < index_at(i), "index must be ordered ascending");
2062 sum += count_at(i);
2063 }
2064 assert(sum == number_of_ops(), "wrong total sum");
2065 }
2066 #endif