1 /*
2 * Copyright (c) 2016, 2020, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2016, 2020 SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "jvm.h"
28 #include "asm/assembler.inline.hpp"
29 #include "compiler/disassembler.hpp"
30 #include "code/compiledIC.hpp"
31 #include "memory/resourceArea.hpp"
32 #include "runtime/java.hpp"
33 #include "runtime/stubCodeGenerator.hpp"
34 #include "runtime/vm_version.hpp"
35
36 # include <sys/sysinfo.h>
37
38 bool VM_Version::_is_determine_features_test_running = false;
39 const char* VM_Version::_model_string;
40
41 unsigned long VM_Version::_features[_features_buffer_len] = {0, 0, 0, 0};
42 unsigned long VM_Version::_cipher_features[_features_buffer_len] = {0, 0, 0, 0};
43 unsigned long VM_Version::_msgdigest_features[_features_buffer_len] = {0, 0, 0, 0};
44 unsigned int VM_Version::_nfeatures = 0;
45 unsigned int VM_Version::_ncipher_features = 0;
46 unsigned int VM_Version::_nmsgdigest_features = 0;
47 unsigned int VM_Version::_Dcache_lineSize = DEFAULT_CACHE_LINE_SIZE;
48 unsigned int VM_Version::_Icache_lineSize = DEFAULT_CACHE_LINE_SIZE;
49
50 static const char* z_gen[] = {" ", "G1", "G2", "G3", "G4", "G5", "G6", "G7" };
51 static const char* z_machine[] = {" ", "2064", "2084", "2094", "2097", "2817", " ", "2964" };
52 static const char* z_name[] = {" ", "z900", "z990", "z9 EC", "z10 EC", "z196 EC", "ec12", "z13" };
53
54 void VM_Version::initialize() {
55 determine_features(); // Get processor capabilities.
56 set_features_string(); // Set a descriptive feature indication.
57
58 if (Verbose) {
59 print_features();
60 }
61
62 intx cache_line_size = Dcache_lineSize(0);
63
64 #ifdef COMPILER2
65 MaxVectorSize = 8;
66 #endif
67
68 if (has_PrefetchRaw()) {
69 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { // not preset
70 // 0 = no prefetch.
71 // 1 = Prefetch instructions for each allocation.
72 // 2 = Use TLAB watermark to gate allocation prefetch.
73 AllocatePrefetchStyle = 1;
74 }
75
76 if (AllocatePrefetchStyle > 0) { // Prefetching turned on at all?
77 // Distance to prefetch ahead of allocation pointer.
78 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance) || (AllocatePrefetchDistance < 0)) { // not preset
79 AllocatePrefetchDistance = 0;
80 }
81
82 // Number of lines to prefetch ahead of allocation pointer.
83 if (FLAG_IS_DEFAULT(AllocatePrefetchLines) || (AllocatePrefetchLines <= 0)) { // not preset
84 AllocatePrefetchLines = 3;
85 }
86
87 // Step size in bytes of sequential prefetch instructions.
88 if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize) || (AllocatePrefetchStepSize <= 0)) { // not preset
89 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
90 } else if (AllocatePrefetchStepSize < cache_line_size) {
91 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
92 } else {
93 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
94 }
95 } else {
96 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0);
97 AllocatePrefetchDistance = 0;
98 AllocatePrefetchLines = 0;
99 // Can't be zero. Will SIGFPE during constraints checking.
100 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
101 }
102
103 } else {
104 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0);
105 AllocatePrefetchDistance = 0;
106 AllocatePrefetchLines = 0;
107 // Can't be zero. Will SIGFPE during constraints checking.
108 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size);
109 }
110
111 // TODO:
112 // On z/Architecture, cache line size is significantly large (256 bytes). Do we really need
113 // to keep contended members that far apart? Performance tests are required.
114 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) && (cache_line_size > ContendedPaddingWidth)) {
115 ContendedPaddingWidth = cache_line_size;
116 }
117
118 // On z/Architecture, the CRC32/CRC32C intrinsics are implemented "by hand".
119 // TODO: Provide implementation based on the vector instructions available from z13.
120 // Note: The CHECKSUM instruction, which has been there since the very beginning
121 // (of z/Architecture), computes "some kind of" a checksum.
122 // It has nothing to do with the CRC32 algorithm.
123 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
124 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true);
125 }
126 if (FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) {
127 FLAG_SET_DEFAULT(UseCRC32CIntrinsics, true);
128 }
129
130 // TODO: Provide implementation.
131 if (UseAdler32Intrinsics) {
132 warning("Adler32Intrinsics not available on this CPU.");
133 FLAG_SET_DEFAULT(UseAdler32Intrinsics, false);
134 }
135
136 // On z/Architecture, we take UseAES as the general switch to enable/disable the AES intrinsics.
137 // The specific, and yet to be defined, switches UseAESxxxIntrinsics will then be set
138 // depending on the actual machine capabilities.
139 // Explicitly setting them via CmdLine option takes precedence, of course.
140 // TODO: UseAESIntrinsics must be made keylength specific.
141 // As of March 2015 and Java8, only AES128 is supported by the Java Cryptographic Extensions.
142 // Therefore, UseAESIntrinsics is of minimal use at the moment.
143 if (FLAG_IS_DEFAULT(UseAES) && has_Crypto_AES()) {
144 FLAG_SET_DEFAULT(UseAES, true);
145 }
146 if (UseAES && !has_Crypto_AES()) {
147 warning("AES instructions are not available on this CPU");
148 FLAG_SET_DEFAULT(UseAES, false);
149 }
150 if (UseAES) {
151 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
152 FLAG_SET_DEFAULT(UseAESIntrinsics, true);
153 }
154 }
155 if (UseAESIntrinsics && !has_Crypto_AES()) {
156 warning("AES intrinsics are not available on this CPU");
157 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
158 }
159 if (UseAESIntrinsics && !UseAES) {
160 warning("AES intrinsics require UseAES flag to be enabled. Intrinsics will be disabled.");
161 FLAG_SET_DEFAULT(UseAESIntrinsics, false);
162 }
163
164 // TODO: implement AES/CTR intrinsics
165 if (UseAESCTRIntrinsics) {
166 warning("AES/CTR intrinsics are not available on this CPU");
167 FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false);
168 }
169
170 if (FLAG_IS_DEFAULT(UseGHASHIntrinsics) && has_Crypto_GHASH()) {
171 FLAG_SET_DEFAULT(UseGHASHIntrinsics, true);
172 }
173 if (UseGHASHIntrinsics && !has_Crypto_GHASH()) {
174 warning("GHASH intrinsics are not available on this CPU");
175 FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
176 }
177
178 if (FLAG_IS_DEFAULT(UseFMA)) {
179 FLAG_SET_DEFAULT(UseFMA, true);
180 }
181
182 if (UseMD5Intrinsics) {
183 warning("MD5 intrinsics are not available on this CPU");
184 FLAG_SET_DEFAULT(UseMD5Intrinsics, false);
185 }
186
187 // On z/Architecture, we take UseSHA as the general switch to enable/disable the SHA intrinsics.
188 // The specific switches UseSHAxxxIntrinsics will then be set depending on the actual
189 // machine capabilities.
190 // Explicitly setting them via CmdLine option takes precedence, of course.
191 if (FLAG_IS_DEFAULT(UseSHA) && has_Crypto_SHA()) {
192 FLAG_SET_DEFAULT(UseSHA, true);
193 }
194 if (UseSHA && !has_Crypto_SHA()) {
195 warning("SHA instructions are not available on this CPU");
196 FLAG_SET_DEFAULT(UseSHA, false);
197 }
198 if (UseSHA && has_Crypto_SHA1()) {
199 if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) {
200 FLAG_SET_DEFAULT(UseSHA1Intrinsics, true);
201 }
202 } else if (UseSHA1Intrinsics) {
203 warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU.");
204 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
205 }
206 if (UseSHA && has_Crypto_SHA256()) {
207 if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) {
208 FLAG_SET_DEFAULT(UseSHA256Intrinsics, true);
209 }
210 } else if (UseSHA256Intrinsics) {
211 warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU.");
212 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
213 }
214 if (UseSHA && has_Crypto_SHA512()) {
215 if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) {
216 FLAG_SET_DEFAULT(UseSHA512Intrinsics, true);
217 }
218 } else if (UseSHA512Intrinsics) {
219 warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU.");
220 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
221 }
222
223 if (UseSHA3Intrinsics) {
224 warning("Intrinsics for SHA3-224, SHA3-256, SHA3-384 and SHA3-512 crypto hash functions not available on this CPU.");
225 FLAG_SET_DEFAULT(UseSHA3Intrinsics, false);
226 }
227
228 if (!(UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics)) {
229 FLAG_SET_DEFAULT(UseSHA, false);
230 }
231
232 #ifdef COMPILER2
233 if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
234 FLAG_SET_DEFAULT(UseMultiplyToLenIntrinsic, true);
235 }
236 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) {
237 FLAG_SET_DEFAULT(UseMontgomeryMultiplyIntrinsic, true);
238 }
239 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) {
240 FLAG_SET_DEFAULT(UseMontgomerySquareIntrinsic, true);
241 }
242 #endif
243 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
244 FLAG_SET_DEFAULT(UsePopCountInstruction, true);
245 }
246
247 // z/Architecture supports 8-byte compare-exchange operations
248 // (see Atomic::cmpxchg)
249 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile).
250 _supports_cx8 = true;
251
252 _supports_atomic_getadd4 = VM_Version::has_LoadAndALUAtomicV1();
253 _supports_atomic_getadd8 = VM_Version::has_LoadAndALUAtomicV1();
254
255 // z/Architecture supports unaligned memory accesses.
256 // Performance penalty is negligible. An additional tick or so
257 // is lost if the accessed data spans a cache line boundary.
258 // Unaligned accesses are not atomic, of course.
259 if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) {
260 FLAG_SET_DEFAULT(UseUnalignedAccesses, true);
261 }
262 }
263
264
265 void VM_Version::set_features_string() {
266 // A note on the _features_string format:
267 // There are jtreg tests checking the _features_string for various properties.
268 // For some strange reason, these tests require the string to contain
269 // only _lowercase_ characters. Keep that in mind when being surprised
270 // about the unusual notation of features - and when adding new ones.
271 // Features may have one comma at the end.
272 // Furthermore, use one, and only one, separator space between features.
273 // Multiple spaces are considered separate tokens, messing up everything.
274 unsigned int ambiguity = 0;
275 _model_string = z_name[0];
276 if (is_z13()) {
277 _features_string = "system-z, g7-z13, ldisp_fast, extimm, pcrel_load/store, cmpb, cond_load/store, interlocked_update, txm, vectorinstr";
278 _model_string = z_name[7];
279 ambiguity++;
280 }
281 if (is_ec12()) {
282 _features_string = "system-z, g6-ec12, ldisp_fast, extimm, pcrel_load/store, cmpb, cond_load/store, interlocked_update, txm";
283 _model_string = z_name[6];
284 ambiguity++;
285 }
286 if (is_z196()) {
287 _features_string = "system-z, g5-z196, ldisp_fast, extimm, pcrel_load/store, cmpb, cond_load/store, interlocked_update";
288 _model_string = z_name[5];
289 ambiguity++;
290 }
291 if (is_z10()) {
292 _features_string = "system-z, g4-z10, ldisp_fast, extimm, pcrel_load/store, cmpb";
293 _model_string = z_name[4];
294 ambiguity++;
295 }
296 if (is_z9()) {
297 _features_string = "system-z, g3-z9, ldisp_fast, extimm, out-of-support as of 2016-04-01";
298 _model_string = z_name[3];
299 ambiguity++;
300 }
301 if (is_z990()) {
302 _features_string = "system-z, g2-z990, ldisp_fast, out-of-support as of 2014-07-01";
303 _model_string = z_name[2];
304 ambiguity++;
305 }
306 if (is_z900()) {
307 _features_string = "system-z, g1-z900, ldisp, out-of-support as of 2014-07-01";
308 _model_string = z_name[1];
309 ambiguity++;
310 }
311
312 if (ambiguity == 0) {
313 _features_string = "z/Architecture (unknown generation)";
314 } else if (ambiguity > 1) {
315 tty->print_cr("*** WARNING *** Ambiguous z/Architecture detection, ambiguity = %d", ambiguity);
316 tty->print_cr(" oldest detected generation is %s", _features_string);
317 _features_string = "z/Architecture (ambiguous detection)";
318 }
319
320 if (has_Crypto_AES()) {
321 char buf[256];
322 assert(strlen(_features_string) + 3*8 < sizeof(buf), "increase buffer size");
323 jio_snprintf(buf, sizeof(buf), "%s%s%s%s",
324 _features_string,
325 has_Crypto_AES128() ? ", aes128" : "",
326 has_Crypto_AES192() ? ", aes192" : "",
327 has_Crypto_AES256() ? ", aes256" : "");
328 _features_string = os::strdup(buf);
329 }
330
331 if (has_Crypto_SHA()) {
332 char buf[256];
333 assert(strlen(_features_string) + 6 + 2*8 + 7 < sizeof(buf), "increase buffer size");
334 jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s",
335 _features_string,
336 has_Crypto_SHA1() ? ", sha1" : "",
337 has_Crypto_SHA256() ? ", sha256" : "",
338 has_Crypto_SHA512() ? ", sha512" : "",
339 has_Crypto_GHASH() ? ", ghash" : "");
340 if (has_Crypto_AES()) { os::free((void *)_features_string); }
341 _features_string = os::strdup(buf);
342 }
343 }
344
345 // featureBuffer - bit array indicating availability of various features
346 // featureNum - bit index of feature to be tested
347 // Featurenum < 0 requests test for any nonzero bit in featureBuffer.
348 // bufLen - length of featureBuffer in bits
349 bool VM_Version::test_feature_bit(unsigned long* featureBuffer, int featureNum, unsigned int bufLen) {
350 assert(bufLen > 0, "buffer len must be positive");
351 assert((bufLen & 0x0007) == 0, "unaligned buffer len");
352 assert(((intptr_t)featureBuffer&0x0007) == 0, "unaligned feature buffer");
353 if (featureNum < 0) {
354 // Any bit set at all?
355 bool anyBit = false;
356 for (size_t i = 0; i < bufLen/(8*sizeof(long)); i++) {
357 anyBit = anyBit || (featureBuffer[i] != 0);
358 }
359 return anyBit;
360 } else {
361 assert((unsigned int)featureNum < bufLen, "feature index out of range");
362 unsigned char* byteBuffer = (unsigned char*)featureBuffer;
363 int byteIndex = featureNum/(8*sizeof(char));
364 int bitIndex = featureNum%(8*sizeof(char));
365 // Indexed bit set?
366 return (byteBuffer[byteIndex] & (1U<<(7-bitIndex))) != 0;
367 }
368 }
369
370 void VM_Version::print_features_internal(const char* text, bool print_anyway) {
371 tty->print_cr("%s %s", text, features_string());
372 tty->print("%s", text);
373 for (unsigned int i = 0; i < _nfeatures; i++) {
374 tty->print(" 0x%16.16lx", _features[i]);
375 }
376 tty->cr();
377
378 if (Verbose || print_anyway) {
379 // z900
380 if (has_long_displacement() ) tty->print_cr("available: %s", "LongDispFacility");
381 // z990
382 if (has_long_displacement_fast() ) tty->print_cr("available: %s", "LongDispFacilityHighPerf");
383 if (has_ETF2() && has_ETF3() ) tty->print_cr("available: %s", "ETF2 and ETF3");
384 if (has_Crypto() ) tty->print_cr("available: %s", "CryptoFacility");
385 // z9
386 if (has_extended_immediate() ) tty->print_cr("available: %s", "ExtImmedFacility");
387 if (has_StoreFacilityListExtended()) tty->print_cr("available: %s", "StoreFacilityListExtended");
388 if (has_StoreClockFast() ) tty->print_cr("available: %s", "StoreClockFast");
389 if (has_ETF2Enhancements() ) tty->print_cr("available: %s", "ETF2 Enhancements");
390 if (has_ETF3Enhancements() ) tty->print_cr("available: %s", "ETF3 Enhancements");
391 if (has_HFPUnnormalized() ) tty->print_cr("available: %s", "HFPUnnormalizedFacility");
392 if (has_HFPMultiplyAndAdd() ) tty->print_cr("available: %s", "HFPMultiplyAndAddFacility");
393 // z10
394 if (has_ParsingEnhancements() ) tty->print_cr("available: %s", "Parsing Enhancements");
395 if (has_ExtractCPUtime() ) tty->print_cr("available: %s", "ExtractCPUTime");
396 if (has_CompareSwapStore() ) tty->print_cr("available: %s", "CompareSwapStore");
397 if (has_GnrlInstrExtensions() ) tty->print_cr("available: %s", "General Instruction Extensions");
398 if (has_CompareBranch() ) tty->print_cr(" available: %s", "Compare and Branch");
399 if (has_CompareTrap() ) tty->print_cr(" available: %s", "Compare and Trap");
400 if (has_RelativeLoadStore() ) tty->print_cr(" available: %s", "Relative Load/Store");
401 if (has_MultiplySingleImm32() ) tty->print_cr(" available: %s", "MultiplySingleImm32");
402 if (has_Prefetch() ) tty->print_cr(" available: %s", "Prefetch");
403 if (has_MoveImmToMem() ) tty->print_cr(" available: %s", "Direct Moves Immediate to Memory");
404 if (has_MemWithImmALUOps() ) tty->print_cr(" available: %s", "Direct ALU Ops Memory .op. Immediate");
405 if (has_ExtractCPUAttributes() ) tty->print_cr(" available: %s", "Extract CPU Atributes");
406 if (has_ExecuteExtensions() ) tty->print_cr("available: %s", "ExecuteExtensions");
407 if (has_FPSupportEnhancements() ) tty->print_cr("available: %s", "FPSupportEnhancements");
408 if (has_DecimalFloatingPoint() ) tty->print_cr("available: %s", "DecimalFloatingPoint");
409 // z196
410 if (has_DistinctOpnds() ) tty->print_cr("available: %s", "Distinct Operands");
411 if (has_InterlockedAccessV1() ) tty->print_cr(" available: %s", "InterlockedAccess V1 (fast)");
412 if (has_PopCount() ) tty->print_cr(" available: %s", "PopCount");
413 if (has_LoadStoreConditional() ) tty->print_cr(" available: %s", "LoadStoreConditional");
414 if (has_HighWordInstr() ) tty->print_cr(" available: %s", "HighWord Instructions");
415 if (has_FastSync() ) tty->print_cr(" available: %s", "FastSync (bcr 14,0)");
416 if (has_AtomicMemWithImmALUOps() ) tty->print_cr("available: %s", "Atomic Direct ALU Ops Memory .op. Immediate");
417 if (has_FPExtensions() ) tty->print_cr("available: %s", "Floatingpoint Extensions");
418 if (has_CryptoExt3() ) tty->print_cr("available: %s", "Crypto Extensions 3");
419 if (has_CryptoExt4() ) tty->print_cr("available: %s", "Crypto Extensions 4");
420 // EC12
421 if (has_MiscInstrExt() ) tty->print_cr("available: %s", "Miscelaneous Instruction Extensions");
422 if (has_ExecutionHint() ) tty->print_cr(" available: %s", "Execution Hints (branch prediction)");
423 if (has_ProcessorAssist() ) tty->print_cr(" available: %s", "Processor Assists");
424 if (has_LoadAndTrap() ) tty->print_cr(" available: %s", "Load and Trap");
425 if (has_TxMem() ) tty->print_cr("available: %s", "Transactional Memory");
426 if (has_InterlockedAccessV2() ) tty->print_cr(" available: %s", "InterlockedAccess V2 (fast)");
427 if (has_DFPZonedConversion() ) tty->print_cr(" available: %s", "DFP Zoned Conversions");
428 // z13
429 if (has_LoadStoreConditional2() ) tty->print_cr("available: %s", "Load/Store Conditional 2");
430 if (has_CryptoExt5() ) tty->print_cr("available: %s", "Crypto Extensions 5");
431 if (has_DFPPackedConversion() ) tty->print_cr("available: %s", "DFP Packed Conversions");
432 if (has_VectorFacility() ) tty->print_cr("available: %s", "Vector Facility");
433 // test switches
434 if (has_TestFeature1Impl() ) tty->print_cr("available: %s", "TestFeature1Impl");
435 if (has_TestFeature2Impl() ) tty->print_cr("available: %s", "TestFeature2Impl");
436 if (has_TestFeature4Impl() ) tty->print_cr("available: %s", "TestFeature4Impl");
437 if (has_TestFeature8Impl() ) tty->print_cr("available: %s", "TestFeature8Impl");
438
439 if (has_Crypto()) {
440 tty->cr();
441 tty->print_cr("detailed availability of %s capabilities:", "CryptoFacility");
442 if (test_feature_bit(&_cipher_features[0], -1, 2*Cipher::_featureBits)) {
443 tty->cr();
444 tty->print_cr(" available: %s", "Message Cipher Functions");
445 }
446 if (test_feature_bit(&_cipher_features[0], -1, (int)Cipher::_featureBits)) {
447 tty->print_cr(" available Crypto Features of KM (Cipher Message):");
448 for (unsigned int i = 0; i < Cipher::_featureBits; i++) {
449 if (test_feature_bit(&_cipher_features[0], i, (int)Cipher::_featureBits)) {
450 switch (i) {
451 case Cipher::_Query: tty->print_cr(" available: KM Query"); break;
452 case Cipher::_DEA: tty->print_cr(" available: KM DEA"); break;
453 case Cipher::_TDEA128: tty->print_cr(" available: KM TDEA-128"); break;
454 case Cipher::_TDEA192: tty->print_cr(" available: KM TDEA-192"); break;
455 case Cipher::_EncryptedDEA: tty->print_cr(" available: KM Encrypted DEA"); break;
456 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KM Encrypted DEA-128"); break;
457 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KM Encrypted DEA-192"); break;
458 case Cipher::_AES128: tty->print_cr(" available: KM AES-128"); break;
459 case Cipher::_AES192: tty->print_cr(" available: KM AES-192"); break;
460 case Cipher::_AES256: tty->print_cr(" available: KM AES-256"); break;
461 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KM Encrypted-AES-128"); break;
462 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KM Encrypted-AES-192"); break;
463 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KM Encrypted-AES-256"); break;
464 case Cipher::_XTSAES128: tty->print_cr(" available: KM XTS-AES-128"); break;
465 case Cipher::_XTSAES256: tty->print_cr(" available: KM XTS-AES-256"); break;
466 case Cipher::_EncryptedXTSAES128: tty->print_cr(" available: KM XTS-Encrypted-AES-128"); break;
467 case Cipher::_EncryptedXTSAES256: tty->print_cr(" available: KM XTS-Encrypted-AES-256"); break;
468 default: tty->print_cr(" available: unknown KM code %d", i); break;
469 }
470 }
471 }
472 }
473 if (test_feature_bit(&_cipher_features[2], -1, (int)Cipher::_featureBits)) {
474 tty->print_cr(" available Crypto Features of KMC (Cipher Message with Chaining):");
475 for (unsigned int i = 0; i < Cipher::_featureBits; i++) {
476 if (test_feature_bit(&_cipher_features[2], i, (int)Cipher::_featureBits)) {
477 switch (i) {
478 case Cipher::_Query: tty->print_cr(" available: KMC Query"); break;
479 case Cipher::_DEA: tty->print_cr(" available: KMC DEA"); break;
480 case Cipher::_TDEA128: tty->print_cr(" available: KMC TDEA-128"); break;
481 case Cipher::_TDEA192: tty->print_cr(" available: KMC TDEA-192"); break;
482 case Cipher::_EncryptedDEA: tty->print_cr(" available: KMC Encrypted DEA"); break;
483 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KMC Encrypted DEA-128"); break;
484 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KMC Encrypted DEA-192"); break;
485 case Cipher::_AES128: tty->print_cr(" available: KMC AES-128"); break;
486 case Cipher::_AES192: tty->print_cr(" available: KMC AES-192"); break;
487 case Cipher::_AES256: tty->print_cr(" available: KMC AES-256"); break;
488 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KMC Encrypted-AES-128"); break;
489 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KMC Encrypted-AES-192"); break;
490 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KMC Encrypted-AES-256"); break;
491 case Cipher::_PRNG: tty->print_cr(" available: KMC PRNG"); break;
492 default: tty->print_cr(" available: unknown KMC code %d", i); break;
493 }
494 }
495 }
496 }
497
498 if (test_feature_bit(&_msgdigest_features[0], -1, 2*MsgDigest::_featureBits)) {
499 tty->cr();
500 tty->print_cr(" available: %s", "Message Digest Functions for SHA");
501 }
502 if (test_feature_bit(&_msgdigest_features[0], -1, (int)MsgDigest::_featureBits)) {
503 tty->print_cr(" available Features of KIMD (Msg Digest):");
504 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) {
505 if (test_feature_bit(&_msgdigest_features[0], i, (int)MsgDigest::_featureBits)) {
506 switch (i) {
507 case MsgDigest::_Query: tty->print_cr(" available: KIMD Query"); break;
508 case MsgDigest::_SHA1: tty->print_cr(" available: KIMD SHA-1"); break;
509 case MsgDigest::_SHA256: tty->print_cr(" available: KIMD SHA-256"); break;
510 case MsgDigest::_SHA512: tty->print_cr(" available: KIMD SHA-512"); break;
511 case MsgDigest::_GHASH: tty->print_cr(" available: KIMD GHASH"); break;
512 default: tty->print_cr(" available: unknown code %d", i); break;
513 }
514 }
515 }
516 }
517 if (test_feature_bit(&_msgdigest_features[2], -1, (int)MsgDigest::_featureBits)) {
518 tty->print_cr(" available Features of KLMD (Msg Digest):");
519 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) {
520 if (test_feature_bit(&_msgdigest_features[2], i, (int)MsgDigest::_featureBits)) {
521 switch (i) {
522 case MsgDigest::_Query: tty->print_cr(" available: KLMD Query"); break;
523 case MsgDigest::_SHA1: tty->print_cr(" available: KLMD SHA-1"); break;
524 case MsgDigest::_SHA256: tty->print_cr(" available: KLMD SHA-256"); break;
525 case MsgDigest::_SHA512: tty->print_cr(" available: KLMD SHA-512"); break;
526 default: tty->print_cr(" available: unknown code %d", i); break;
527 }
528 }
529 }
530 }
531 }
532 if (ContendedPaddingWidth > 0) {
533 tty->cr();
534 tty->print_cr("ContendedPaddingWidth " INTX_FORMAT, ContendedPaddingWidth);
535 }
536 }
537 }
538
539 void VM_Version::print_platform_virtualization_info(outputStream* st) {
540 // /proc/sysinfo contains interesting information about
541 // - LPAR
542 // - whole "Box" (CPUs )
543 // - z/VM / KVM (VM<nn>); this is not available in an LPAR-only setup
544 const char* kw[] = { "LPAR", "CPUs", "VM", NULL };
545 const char* info_file = "/proc/sysinfo";
546
547 if (!print_matching_lines_from_file(info_file, st, kw)) {
548 st->print_cr(" <%s Not Available>", info_file);
549 }
550 }
551
552 void VM_Version::print_features() {
553 print_features_internal("Version:");
554 }
555
556 void VM_Version::reset_features(bool reset) {
557 if (reset) {
558 for (unsigned int i = 0; i < _features_buffer_len; i++) {
559 VM_Version::_features[i] = 0;
560 }
561 }
562 }
563
564 void VM_Version::set_features_z900(bool reset) {
565 reset_features(reset);
566
567 set_has_long_displacement();
568 set_has_ETF2();
569 }
570
571 void VM_Version::set_features_z990(bool reset) {
572 reset_features(reset);
573
574 set_features_z900(false);
575 set_has_ETF3();
576 set_has_long_displacement_fast();
577 set_has_HFPMultiplyAndAdd();
578 }
579
580 void VM_Version::set_features_z9(bool reset) {
581 reset_features(reset);
582
583 set_features_z990(false);
584 set_has_StoreFacilityListExtended();
585 // set_has_Crypto(); // Do not set, crypto features must be retrieved separately.
586 set_has_ETF2Enhancements();
587 set_has_ETF3Enhancements();
588 set_has_extended_immediate();
589 set_has_StoreClockFast();
590 set_has_HFPUnnormalized();
591 }
592
593 void VM_Version::set_features_z10(bool reset) {
594 reset_features(reset);
595
596 set_features_z9(false);
597 set_has_CompareSwapStore();
598 set_has_RelativeLoadStore();
599 set_has_CompareBranch();
600 set_has_CompareTrap();
601 set_has_MultiplySingleImm32();
602 set_has_Prefetch();
603 set_has_MoveImmToMem();
604 set_has_MemWithImmALUOps();
605 set_has_ExecuteExtensions();
606 set_has_FPSupportEnhancements();
607 set_has_DecimalFloatingPoint();
608 set_has_ExtractCPUtime();
609 set_has_CryptoExt3();
610 }
611
612 void VM_Version::set_features_z196(bool reset) {
613 reset_features(reset);
614
615 set_features_z10(false);
616 set_has_InterlockedAccessV1();
617 set_has_PopCount();
618 set_has_LoadStoreConditional();
619 set_has_HighWordInstr();
620 set_has_FastSync();
621 set_has_FPExtensions();
622 set_has_DistinctOpnds();
623 set_has_CryptoExt4();
624 }
625
626 void VM_Version::set_features_ec12(bool reset) {
627 reset_features(reset);
628
629 set_features_z196(false);
630 set_has_MiscInstrExt();
631 set_has_InterlockedAccessV2();
632 set_has_LoadAndALUAtomicV2();
633 set_has_TxMem();
634 }
635
636 void VM_Version::set_features_z13(bool reset) {
637 reset_features(reset);
638
639 set_features_ec12(false);
640 set_has_LoadStoreConditional2();
641 set_has_CryptoExt5();
642 set_has_VectorFacility();
643 }
644
645 void VM_Version::set_features_from(const char* march) {
646 bool err = false;
647 bool prt = false;
648
649 if ((march != NULL) && (march[0] != '\0')) {
650 const int buf_len = 16;
651 const int hdr_len = 5;
652 char buf[buf_len];
653 if (strlen(march) >= hdr_len) {
654 memcpy(buf, march, hdr_len);
655 buf[hdr_len] = '\00';
656 } else {
657 buf[0] = '\00';
658 }
659
660 if (!strcmp(march, "z900")) {
661 set_features_z900();
662 } else if (!strcmp(march, "z990")) {
663 set_features_z990();
664 } else if (!strcmp(march, "z9")) {
665 set_features_z9();
666 } else if (!strcmp(march, "z10")) {
667 set_features_z10();
668 } else if (!strcmp(march, "z196")) {
669 set_features_z196();
670 } else if (!strcmp(march, "ec12")) {
671 set_features_ec12();
672 } else if (!strcmp(march, "z13")) {
673 set_features_z13();
674 } else if (!strcmp(buf, "ztest")) {
675 assert(!has_TestFeaturesImpl(), "possible facility list flag conflict");
676 if (strlen(march) > hdr_len) {
677 int itest = 0;
678 if ((strlen(march)-hdr_len) >= buf_len) err = true;
679 if (!err) {
680 memcpy(buf, &march[hdr_len], strlen(march)-hdr_len);
681 buf[strlen(march)-hdr_len] = '\00';
682 for (size_t i = 0; !err && (i < strlen(buf)); i++) {
683 itest = itest*10 + buf[i]-'0';
684 err = err || ((buf[i]-'0') < 0) || ((buf[i]-'0') > 9) || (itest > 15);
685 }
686 }
687 if (!err) {
688 prt = true;
689 if (itest & 0x01) { set_has_TestFeature1Impl(); }
690 if (itest & 0x02) { set_has_TestFeature2Impl(); }
691 if (itest & 0x04) { set_has_TestFeature4Impl(); }
692 if (itest & 0x08) { set_has_TestFeature8Impl(); }
693 }
694 } else {
695 prt = true;
696 set_has_TestFeature1Impl();
697 set_has_TestFeature2Impl();
698 set_has_TestFeature4Impl();
699 set_has_TestFeature8Impl();
700 }
701 } else {
702 err = true;
703 }
704 if (!err) {
705 set_features_string();
706 if (prt || PrintAssembly) {
707 print_features_internal("CPU Version as set by cmdline option:", prt);
708 }
709 } else {
710 tty->print_cr("***Warning: Unsupported ProcessorArchitecture: %s, internal settings left undisturbed.", march);
711 }
712 }
713
714 }
715
716 static long (*getFeatures)(unsigned long*, int, int) = NULL;
717
718 void VM_Version::set_getFeatures(address entryPoint) {
719 if (getFeatures == NULL) {
720 getFeatures = (long(*)(unsigned long*, int, int))entryPoint;
721 }
722 }
723
724 long VM_Version::call_getFeatures(unsigned long* buffer, int buflen, int functionCode) {
725 VM_Version::_is_determine_features_test_running = true;
726 long functionResult = (*getFeatures)(buffer, buflen, functionCode);
727 VM_Version::_is_determine_features_test_running = false;
728 return functionResult;
729 }
730
731 // Helper function for "extract cache attribute" instruction.
732 int VM_Version::calculate_ECAG_functionCode(unsigned int attributeIndication,
733 unsigned int levelIndication,
734 unsigned int typeIndication) {
735 return (attributeIndication<<4) | (levelIndication<<1) | typeIndication;
736 }
737
738 void VM_Version::determine_features() {
739
740 const int cbuf_size = _code_buffer_len;
741 const int buf_len = _features_buffer_len;
742
743 // Allocate code buffer space for the detection code.
744 ResourceMark rm;
745 CodeBuffer cbuf("determine CPU features", cbuf_size, 0);
746 MacroAssembler* a = new MacroAssembler(&cbuf);
747
748 // Emit code.
749 set_getFeatures(a->pc());
750 address code = a->pc();
751
752 // Try STFLE. Possible INVOP will cause defaults to be used.
753 Label getFEATURES;
754 Label getCPUFEATURES; // fcode = -1 (cache)
755 Label getCIPHERFEATURES; // fcode = -2 (cipher)
756 Label getMSGDIGESTFEATURES; // fcode = -3 (SHA)
757 Label getVECTORFEATURES; // fcode = -4 (OS support for vector instructions)
758 Label errRTN;
759 a->z_ltgfr(Z_R0, Z_ARG2); // Buf len to r0 and test.
760 a->z_brl(getFEATURES); // negative -> Get machine features not covered by facility list.
761 a->z_lghi(Z_R1,0);
762 a->z_brz(errRTN); // zero -> Function code currently not used, indicate "aborted".
763
764 a->z_aghi(Z_R0, -1);
765 a->z_stfle(0, Z_ARG1);
766 a->z_lg(Z_R1, 0, Z_ARG1); // Get first DW of facility list.
767 a->z_lgr(Z_RET, Z_R0); // Calculate rtn value for success.
768 a->z_la(Z_RET, 1, Z_RET);
769 a->z_brnz(errRTN); // Instr failed if non-zero CC.
770 a->z_ltgr(Z_R1, Z_R1); // Instr failed if first DW == 0.
771 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Successful return.
772
773 a->bind(errRTN);
774 a->z_lngr(Z_RET, Z_RET);
775 a->z_ltgr(Z_R1, Z_R1);
776 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Return "buffer too small".
777 a->z_xgr(Z_RET, Z_RET);
778 a->z_br(Z_R14); // Return "operation aborted".
779
780 a->bind(getFEATURES);
781 a->z_cghi(Z_R0, -1); // -1: Extract CPU attributes, currently: cache layout only.
782 a->z_bre(getCPUFEATURES);
783 a->z_cghi(Z_R0, -2); // -2: Extract detailed crypto capabilities (cipher instructions).
784 a->z_bre(getCIPHERFEATURES);
785 a->z_cghi(Z_R0, -3); // -3: Extract detailed crypto capabilities (msg digest instructions).
786 a->z_bre(getMSGDIGESTFEATURES);
787 a->z_cghi(Z_R0, -4); // -4: Verify vector instruction availability (OS support).
788 a->z_bre(getVECTORFEATURES);
789
790 a->z_xgr(Z_RET, Z_RET); // Not a valid function code.
791 a->z_br(Z_R14); // Return "operation aborted".
792
793 // Try KIMD/KLMD query function to get details about msg digest (secure hash, SHA) instructions.
794 a->bind(getMSGDIGESTFEATURES);
795 a->z_lghi(Z_R0,(int)MsgDigest::_Query); // query function code
796 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size
797 a->z_kimd(Z_R2,Z_R2); // Get available KIMD functions (bit pattern in param blk).
798 a->z_la(Z_R1,16,Z_R1); // next param block addr
799 a->z_klmd(Z_R2,Z_R2); // Get available KLMD functions (bit pattern in param blk).
800 a->z_lghi(Z_RET,4);
801 a->z_br(Z_R14);
802
803 // Try KM/KMC query function to get details about crypto instructions.
804 a->bind(getCIPHERFEATURES);
805 a->z_lghi(Z_R0,(int)Cipher::_Query); // query function code
806 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size (KIMD/KLMD output)
807 a->z_km(Z_R2,Z_R2); // get available KM functions
808 a->z_la(Z_R1,16,Z_R1); // next param block addr
809 a->z_kmc(Z_R2,Z_R2); // get available KMC functions
810 a->z_lghi(Z_RET,4);
811 a->z_br(Z_R14);
812
813 // Use EXTRACT CPU ATTRIBUTE instruction to get information about cache layout.
814 a->bind(getCPUFEATURES);
815 a->z_xgr(Z_R0,Z_R0); // as recommended in instruction documentation
816 a->z_ecag(Z_RET,Z_R0,0,Z_ARG3); // Extract information as requested by Z_ARG1 contents.
817 a->z_br(Z_R14);
818
819 // Use a vector instruction to verify OS support. Will fail with SIGFPE if OS support is missing.
820 a->bind(getVECTORFEATURES);
821 a->z_vtm(Z_V0,Z_V0); // non-destructive vector instruction. Will cause SIGFPE if not supported.
822 a->z_br(Z_R14);
823
824 address code_end = a->pc();
825 a->flush();
826
827 cbuf.insts()->set_end(code_end);
828
829 // Print the detection code.
830 bool printVerbose = Verbose || PrintAssembly || PrintStubCode;
831 if (printVerbose) {
832 ttyLocker ttyl;
833 tty->print_cr("Decoding CPU feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code));
834 tty->print_cr("Stub length is %ld bytes, codebuffer reserves %d bytes, %ld bytes spare.",
835 code_end-code, cbuf_size, cbuf_size-(code_end-code));
836
837 // Use existing decode function. This enables the [MachCode] format which is needed to DecodeErrorFile.
838 Disassembler::decode(&cbuf, code, code_end, tty);
839 }
840
841 // Prepare for detection code execution and clear work buffer.
842 _nfeatures = 0;
843 _ncipher_features = 0;
844 unsigned long buffer[buf_len];
845
846 for (int i = 0; i < buf_len; i++) {
847 buffer[i] = 0L;
848 }
849
850 // execute code
851 // Illegal instructions will be replaced by 0 in signal handler.
852 // In case of problems, call_getFeatures will return a not-positive result.
853 long used_len = call_getFeatures(buffer, buf_len, 0);
854
855 bool ok;
856 if (used_len == 1) {
857 ok = true;
858 } else if (used_len > 1) {
859 unsigned int used_lenU = (unsigned int)used_len;
860 ok = true;
861 for (unsigned int i = 1; i < used_lenU; i++) {
862 ok = ok && (buffer[i] == 0L);
863 }
864 if (printVerbose && !ok) {
865 bool compact = false;
866 tty->print_cr("Note: feature list has %d (i.e. more than one) array elements.", used_lenU);
867 if (compact) {
868 tty->print("non-zero feature list elements:");
869 for (unsigned int i = 0; i < used_lenU; i++) {
870 tty->print(" [%d]: 0x%16.16lx", i, buffer[i]);
871 }
872 tty->cr();
873 } else {
874 for (unsigned int i = 0; i < used_lenU; i++) {
875 tty->print_cr("non-zero feature list[%d]: 0x%16.16lx", i, buffer[i]);
876 }
877 }
878
879 if (compact) {
880 tty->print_cr("Active features (compact view):");
881 for (unsigned int k = 0; k < used_lenU; k++) {
882 tty->print_cr(" buffer[%d]:", k);
883 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) {
884 bool line = false;
885 for (unsigned int i = j*8; i < (j+1)*8; i++) {
886 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8);
887 if (bit) {
888 if (!line) {
889 tty->print(" byte[%d]:", j);
890 line = true;
891 }
892 tty->print(" [%3.3d]", i);
893 }
894 }
895 if (line) {
896 tty->cr();
897 }
898 }
899 }
900 } else {
901 tty->print_cr("Active features (full view):");
902 for (unsigned int k = 0; k < used_lenU; k++) {
903 tty->print_cr(" buffer[%d]:", k);
904 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) {
905 tty->print(" byte[%d]:", j);
906 for (unsigned int i = j*8; i < (j+1)*8; i++) {
907 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8);
908 if (bit) {
909 tty->print(" [%3.3d]", i);
910 } else {
911 tty->print(" ");
912 }
913 }
914 tty->cr();
915 }
916 }
917 }
918 }
919 ok = true;
920 } else { // No features retrieved if we reach here. Buffer too short or instr not available.
921 if (used_len < 0) {
922 ok = false;
923 if (printVerbose) {
924 tty->print_cr("feature list buffer[%d] too short, required: buffer[%ld]", buf_len, -used_len);
925 }
926 } else {
927 if (printVerbose) {
928 tty->print_cr("feature list could not be retrieved. Running on z900 or z990? Trying to find out...");
929 }
930 used_len = call_getFeatures(buffer, 0, 0); // Must provide at least two DW buffer elements!!!!
931
932 ok = used_len > 0;
933 if (ok) {
934 if (buffer[1]*10 < buffer[0]) {
935 set_features_z900();
936 } else {
937 set_features_z990();
938 }
939
940 if (printVerbose) {
941 tty->print_cr("Note: high-speed long displacement test used %ld iterations.", used_len);
942 tty->print_cr(" Positive displacement loads took %8.8lu microseconds.", buffer[1]);
943 tty->print_cr(" Negative displacement loads took %8.8lu microseconds.", buffer[0]);
944 if (has_long_displacement_fast()) {
945 tty->print_cr(" assuming high-speed long displacement IS available.");
946 } else {
947 tty->print_cr(" assuming high-speed long displacement is NOT available.");
948 }
949 }
950 } else {
951 if (printVerbose) {
952 tty->print_cr("Note: high-speed long displacement test was not successful.");
953 tty->print_cr(" assuming long displacement is NOT available.");
954 }
955 }
956 return; // Do not copy buffer to _features, no test for cipher features.
957 }
958 }
959
960 if (ok) {
961 // Fill features buffer.
962 // Clear work buffer.
963 for (int i = 0; i < buf_len; i++) {
964 _features[i] = buffer[i];
965 _cipher_features[i] = 0;
966 _msgdigest_features[i] = 0;
967 buffer[i] = 0L;
968 }
969 _nfeatures = used_len;
970 } else {
971 for (int i = 0; i < buf_len; i++) {
972 _features[i] = 0;
973 _cipher_features[i] = 0;
974 _msgdigest_features[i] = 0;
975 buffer[i] = 0L;
976 }
977 _nfeatures = 0;
978 }
979
980 if (has_VectorFacility()) {
981 // Verify that feature can actually be used. OS support required.
982 call_getFeatures(buffer, -4, 0);
983 if (printVerbose) {
984 ttyLocker ttyl;
985 if (has_VectorFacility()) {
986 tty->print_cr(" Vector Facility has been verified to be supported by OS");
987 } else {
988 tty->print_cr(" Vector Facility has been disabled - not supported by OS");
989 }
990 }
991 }
992
993 // Extract Crypto Facility details.
994 if (has_Crypto()) {
995 // Get cipher features.
996 used_len = call_getFeatures(buffer, -2, 0);
997 for (int i = 0; i < buf_len; i++) {
998 _cipher_features[i] = buffer[i];
999 }
1000 _ncipher_features = used_len;
1001
1002 // Get msg digest features.
1003 used_len = call_getFeatures(buffer, -3, 0);
1004 for (int i = 0; i < buf_len; i++) {
1005 _msgdigest_features[i] = buffer[i];
1006 }
1007 _nmsgdigest_features = used_len;
1008 }
1009
1010 static int levelProperties[_max_cache_levels]; // All property indications per level.
1011 static int levelScope[_max_cache_levels]; // private/shared
1012 static const char* levelScopeText[4] = {"No cache ",
1013 "CPU private",
1014 "shared ",
1015 "reserved "};
1016
1017 static int levelType[_max_cache_levels]; // D/I/mixed
1018 static const char* levelTypeText[4] = {"separate D and I caches",
1019 "I cache only ",
1020 "D-cache only ",
1021 "combined D/I cache "};
1022
1023 static unsigned int levelReserved[_max_cache_levels]; // reserved property bits
1024 static unsigned int levelLineSize[_max_cache_levels];
1025 static unsigned int levelTotalSize[_max_cache_levels];
1026 static unsigned int levelAssociativity[_max_cache_levels];
1027
1028
1029 // Extract Cache Layout details.
1030 if (has_ExtractCPUAttributes() && printVerbose) { // For information only, as of now.
1031 bool lineSize_mismatch;
1032 bool print_something;
1033 long functionResult;
1034 unsigned int attributeIndication = 0; // 0..15
1035 unsigned int levelIndication = 0; // 0..8
1036 unsigned int typeIndication = 0; // 0..1 (D-Cache, I-Cache)
1037 int functionCode = calculate_ECAG_functionCode(attributeIndication, levelIndication, typeIndication);
1038
1039 // Get cache topology.
1040 functionResult = call_getFeatures(buffer, -1, functionCode);
1041
1042 for (unsigned int i = 0; i < _max_cache_levels; i++) {
1043 if (functionResult > 0) {
1044 int shiftVal = 8*(_max_cache_levels-(i+1));
1045 levelProperties[i] = (functionResult & (0xffUL<<shiftVal)) >> shiftVal;
1046 levelReserved[i] = (levelProperties[i] & 0xf0) >> 4;
1047 levelScope[i] = (levelProperties[i] & 0x0c) >> 2;
1048 levelType[i] = (levelProperties[i] & 0x03);
1049 } else {
1050 levelProperties[i] = 0;
1051 levelReserved[i] = 0;
1052 levelScope[i] = 0;
1053 levelType[i] = 0;
1054 }
1055 levelLineSize[i] = 0;
1056 levelTotalSize[i] = 0;
1057 levelAssociativity[i] = 0;
1058 }
1059
1060 tty->cr();
1061 tty->print_cr("------------------------------------");
1062 tty->print_cr("--- Cache Topology Information ---");
1063 tty->print_cr("------------------------------------");
1064 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1065 tty->print_cr(" Cache Level %d: <scope> %s | <type> %s",
1066 i+1, levelScopeText[levelScope[i]], levelTypeText[levelType[i]]);
1067 }
1068
1069 // Get D-cache details per level.
1070 _Dcache_lineSize = 0;
1071 lineSize_mismatch = false;
1072 print_something = false;
1073 typeIndication = 0; // 0..1 (D-Cache, I-Cache)
1074 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1075 if ((levelType[i] == 0) || (levelType[i] == 2)) {
1076 print_something = true;
1077
1078 // Get cache line size of level i.
1079 attributeIndication = 1;
1080 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1081 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1082
1083 // Get cache total size of level i.
1084 attributeIndication = 2;
1085 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1086 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1087
1088 // Get cache associativity of level i.
1089 attributeIndication = 3;
1090 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1091 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1092
1093 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize;
1094 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i]);
1095 } else {
1096 levelLineSize[i] = 0;
1097 }
1098 }
1099
1100 if (print_something) {
1101 tty->cr();
1102 tty->print_cr("------------------------------------");
1103 tty->print_cr("--- D-Cache Detail Information ---");
1104 tty->print_cr("------------------------------------");
1105 if (lineSize_mismatch) {
1106 tty->print_cr("WARNING: D-Cache line size mismatch!");
1107 }
1108 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1109 if (levelLineSize[i] > 0) {
1110 tty->print_cr(" D-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d",
1111 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]);
1112 }
1113 }
1114 }
1115
1116 // Get I-cache details per level.
1117 _Icache_lineSize = 0;
1118 lineSize_mismatch = false;
1119 print_something = false;
1120 typeIndication = 1; // 0..1 (D-Cache, I-Cache)
1121 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1122 if ((levelType[i] == 0) || (levelType[i] == 1)) {
1123 print_something = true;
1124
1125 // Get cache line size of level i.
1126 attributeIndication = 1;
1127 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1128 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1129
1130 // Get cache total size of level i.
1131 attributeIndication = 2;
1132 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1133 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1134
1135 // Get cache associativity of level i.
1136 attributeIndication = 3;
1137 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1138 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1139
1140 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize;
1141 lineSize_mismatch = lineSize_mismatch || (_Icache_lineSize != levelLineSize[i]);
1142 } else {
1143 levelLineSize[i] = 0;
1144 }
1145 }
1146
1147 if (print_something) {
1148 tty->cr();
1149 tty->print_cr("------------------------------------");
1150 tty->print_cr("--- I-Cache Detail Information ---");
1151 tty->print_cr("------------------------------------");
1152 if (lineSize_mismatch) {
1153 tty->print_cr("WARNING: I-Cache line size mismatch!");
1154 }
1155 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1156 if (levelLineSize[i] > 0) {
1157 tty->print_cr(" I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d",
1158 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]);
1159 }
1160 }
1161 }
1162
1163 // Get D/I-cache details per level.
1164 lineSize_mismatch = false;
1165 print_something = false;
1166 typeIndication = 0; // 0..1 (D-Cache, I-Cache)
1167 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1168 if (levelType[i] == 3) {
1169 print_something = true;
1170
1171 // Get cache line size of level i.
1172 attributeIndication = 1;
1173 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1174 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1175
1176 // Get cache total size of level i.
1177 attributeIndication = 2;
1178 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1179 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1180
1181 // Get cache associativity of level i.
1182 attributeIndication = 3;
1183 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication);
1184 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode);
1185
1186 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize;
1187 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize;
1188 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i])
1189 || (_Icache_lineSize != levelLineSize[i]);
1190 } else {
1191 levelLineSize[i] = 0;
1192 }
1193 }
1194
1195 if (print_something) {
1196 tty->cr();
1197 tty->print_cr("--------------------------------------");
1198 tty->print_cr("--- D/I-Cache Detail Information ---");
1199 tty->print_cr("--------------------------------------");
1200 if (lineSize_mismatch) {
1201 tty->print_cr("WARNING: D/I-Cache line size mismatch!");
1202 }
1203 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) {
1204 if (levelLineSize[i] > 0) {
1205 tty->print_cr(" D/I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d",
1206 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]);
1207 }
1208 }
1209 }
1210 tty->cr();
1211 }
1212 return;
1213 }
1214
1215 unsigned long VM_Version::z_SIGILL() {
1216 unsigned long ZeroBuffer = 0;
1217 unsigned long work;
1218 asm(
1219 " LA %[work],%[buffer] \n\t" // Load address of buffer.
1220 " LARL 14,+6 \n\t" // Load address of faulting instruction.
1221 " BCR 15,%[work] \n\t" // Branch into buffer, execute whatever is in there.
1222 : [buffer] "+Q" (ZeroBuffer) /* outputs */
1223 , [work] "=&a" (work) /* outputs */
1224 : /* inputs */
1225 : "cc" /* clobbered */
1226 );
1227 return ZeroBuffer;
1228 }
1229
1230 unsigned long VM_Version::z_SIGSEGV() {
1231 unsigned long ZeroBuffer = 0;
1232 unsigned long work;
1233 asm(
1234 " LG %[work],%[buffer] \n\t" // Load zero address.
1235 " STG %[work],0(,%[work])\n\t" // Store to address zero.
1236 : [buffer] "+Q" (ZeroBuffer) /* outputs */
1237 , [work] "=&a" (work) /* outputs */
1238 : /* inputs */
1239 : "cc" /* clobbered */
1240 );
1241 return ZeroBuffer;
1242 }
1243