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src/cpu/aarch64/vm/c1_MacroAssembler_aarch64.hpp

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rev 12409 : 8169177: aarch64: SIGSEGV when "-XX:+ZeroTLAB" is specified along with GC options
Summary: Add zero-initialization to C1 for fast TLAB refills
Reviewed-by: aph, drwhite
Contributed-by: kavitha.natarajan@linaro.org

*** 34,44 **** private: int _rsp_offset; // track rsp changes // initialization void pd_init() { _rsp_offset = 0; } - void zero_memory(Register addr, Register len, Register t1); public: void try_allocate( Register obj, // result: pointer to object after successful allocation Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise --- 34,43 ----
*** 73,83 **** Register obj, // result: pointer to object after successful allocation Register klass, // object klass Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise int con_size_in_bytes, // object size in bytes if known at compile time Register t1, // temp register ! Register t2 // temp register ); // allocation of fixed-size objects // (can also be used to allocate fixed-size arrays, by setting // hdr_size correctly and storing the array length afterwards) --- 72,83 ---- Register obj, // result: pointer to object after successful allocation Register klass, // object klass Register var_size_in_bytes, // object size in bytes if unknown at compile time; invalid otherwise int con_size_in_bytes, // object size in bytes if known at compile time Register t1, // temp register ! Register t2, // temp register ! bool is_tlab_allocated // the object was allocated in a TLAB; relevant for the implementation of ZeroTLAB ); // allocation of fixed-size objects // (can also be used to allocate fixed-size arrays, by setting // hdr_size correctly and storing the array length afterwards)
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