src/cpu/aarch64/vm/aarch64.ad

rev 12410 : 8171410: aarch64: long multiplyExact shifts by 31 instead of 63
Reviewed-by: aph

*** 14084,14102 ****
  %{
    match(Set cr (OverflowMulL op1 op2));
  
    format %{ "mul   rscratch1, $op1, $op2\t#overflow check long\n\t"
              "smulh rscratch2, $op1, $op2\n\t"
!             "cmp   rscratch2, rscratch1, ASR #31\n\t"
              "movw  rscratch1, #0x80000000\n\t"
              "cselw rscratch1, rscratch1, zr, NE\n\t"
              "cmpw  rscratch1, #1" %}
    ins_cost(6 * INSN_COST);
    ins_encode %{
      __ mul(rscratch1, $op1$$Register, $op2$$Register);   // Result bits 0..63
      __ smulh(rscratch2, $op1$$Register, $op2$$Register); // Result bits 64..127
!     __ cmp(rscratch2, rscratch1, Assembler::ASR, 31);    // Top is pure sign ext
      __ movw(rscratch1, 0x80000000);                    // Develop 0 (EQ),
      __ cselw(rscratch1, rscratch1, zr, Assembler::NE); // or 0x80000000 (NE)
      __ cmpw(rscratch1, 1);                             // 0x80000000 - 1 => VS
    %}
  
--- 14084,14102 ----
  %{
    match(Set cr (OverflowMulL op1 op2));
  
    format %{ "mul   rscratch1, $op1, $op2\t#overflow check long\n\t"
              "smulh rscratch2, $op1, $op2\n\t"
!             "cmp   rscratch2, rscratch1, ASR #63\n\t"
              "movw  rscratch1, #0x80000000\n\t"
              "cselw rscratch1, rscratch1, zr, NE\n\t"
              "cmpw  rscratch1, #1" %}
    ins_cost(6 * INSN_COST);
    ins_encode %{
      __ mul(rscratch1, $op1$$Register, $op2$$Register);   // Result bits 0..63
      __ smulh(rscratch2, $op1$$Register, $op2$$Register); // Result bits 64..127
!     __ cmp(rscratch2, rscratch1, Assembler::ASR, 63);    // Top is pure sign ext
      __ movw(rscratch1, 0x80000000);                    // Develop 0 (EQ),
      __ cselw(rscratch1, rscratch1, zr, Assembler::NE); // or 0x80000000 (NE)
      __ cmpw(rscratch1, 1);                             // 0x80000000 - 1 => VS
    %}
  
*** 14110,14128 ****
              || n->in(1)->as_Bool()->_test._test == BoolTest::no_overflow);
    effect(USE labl, KILL cr);
  
    format %{ "mul   rscratch1, $op1, $op2\t#overflow check long\n\t"
              "smulh rscratch2, $op1, $op2\n\t"
!             "cmp   rscratch2, rscratch1, ASR #31\n\t"
              "b$cmp $labl" %}
    ins_cost(4 * INSN_COST); // Branch is rare so treat as INSN_COST
    ins_encode %{
      Label* L = $labl$$label;
      Assembler::Condition cond = (Assembler::Condition)$cmp$$cmpcode;
      __ mul(rscratch1, $op1$$Register, $op2$$Register);   // Result bits 0..63
      __ smulh(rscratch2, $op1$$Register, $op2$$Register); // Result bits 64..127
!     __ cmp(rscratch2, rscratch1, Assembler::ASR, 31);    // Top is pure sign ext
      __ br(cond == Assembler::VS ? Assembler::NE : Assembler::EQ, *L);
    %}
  
    ins_pipe(pipe_serial);
  %}
--- 14110,14128 ----
              || n->in(1)->as_Bool()->_test._test == BoolTest::no_overflow);
    effect(USE labl, KILL cr);
  
    format %{ "mul   rscratch1, $op1, $op2\t#overflow check long\n\t"
              "smulh rscratch2, $op1, $op2\n\t"
!             "cmp   rscratch2, rscratch1, ASR #63\n\t"
              "b$cmp $labl" %}
    ins_cost(4 * INSN_COST); // Branch is rare so treat as INSN_COST
    ins_encode %{
      Label* L = $labl$$label;
      Assembler::Condition cond = (Assembler::Condition)$cmp$$cmpcode;
      __ mul(rscratch1, $op1$$Register, $op2$$Register);   // Result bits 0..63
      __ smulh(rscratch2, $op1$$Register, $op2$$Register); // Result bits 64..127
!     __ cmp(rscratch2, rscratch1, Assembler::ASR, 63);    // Top is pure sign ext
      __ br(cond == Assembler::VS ? Assembler::NE : Assembler::EQ, *L);
    %}
  
    ins_pipe(pipe_serial);
  %}