# HG changeset patch # User enevill # Date 1482100004 18000 # Sun Dec 18 17:26:44 2016 -0500 # Node ID c0e2c655e28064fd01b54a47915037d8f2423f81 # Parent 66e2100be052e42af8064e519658185112be6dc3 8171410: aarch64: long multiplyExact shifts by 31 instead of 63 Reviewed-by: aph diff --git a/src/cpu/aarch64/vm/aarch64.ad b/src/cpu/aarch64/vm/aarch64.ad --- a/src/cpu/aarch64/vm/aarch64.ad +++ b/src/cpu/aarch64/vm/aarch64.ad @@ -14086,7 +14086,7 @@ format %{ "mul rscratch1, $op1, $op2\t#overflow check long\n\t" "smulh rscratch2, $op1, $op2\n\t" - "cmp rscratch2, rscratch1, ASR #31\n\t" + "cmp rscratch2, rscratch1, ASR #63\n\t" "movw rscratch1, #0x80000000\n\t" "cselw rscratch1, rscratch1, zr, NE\n\t" "cmpw rscratch1, #1" %} @@ -14094,7 +14094,7 @@ ins_encode %{ __ mul(rscratch1, $op1$$Register, $op2$$Register); // Result bits 0..63 __ smulh(rscratch2, $op1$$Register, $op2$$Register); // Result bits 64..127 - __ cmp(rscratch2, rscratch1, Assembler::ASR, 31); // Top is pure sign ext + __ cmp(rscratch2, rscratch1, Assembler::ASR, 63); // Top is pure sign ext __ movw(rscratch1, 0x80000000); // Develop 0 (EQ), __ cselw(rscratch1, rscratch1, zr, Assembler::NE); // or 0x80000000 (NE) __ cmpw(rscratch1, 1); // 0x80000000 - 1 => VS @@ -14112,7 +14112,7 @@ format %{ "mul rscratch1, $op1, $op2\t#overflow check long\n\t" "smulh rscratch2, $op1, $op2\n\t" - "cmp rscratch2, rscratch1, ASR #31\n\t" + "cmp rscratch2, rscratch1, ASR #63\n\t" "b$cmp $labl" %} ins_cost(4 * INSN_COST); // Branch is rare so treat as INSN_COST ins_encode %{ @@ -14120,7 +14120,7 @@ Assembler::Condition cond = (Assembler::Condition)$cmp$$cmpcode; __ mul(rscratch1, $op1$$Register, $op2$$Register); // Result bits 0..63 __ smulh(rscratch2, $op1$$Register, $op2$$Register); // Result bits 64..127 - __ cmp(rscratch2, rscratch1, Assembler::ASR, 31); // Top is pure sign ext + __ cmp(rscratch2, rscratch1, Assembler::ASR, 63); // Top is pure sign ext __ br(cond == Assembler::VS ? Assembler::NE : Assembler::EQ, *L); %}