src/cpu/aarch64/vm/assembler_aarch64.hpp

rev 8512 : 8129551: aarch64: some regressions introduced by addition of vectorisation code
Summary: Fix regressions
Reviewed-by: duke

@@ -489,10 +489,15 @@
         i->f(0b00, 25, 24);
         i->f(1, 21);
         i->rf(_index, 16);
         i->f(_ext.option(), 15, 13);
         unsigned size = i->get(31, 30);
+        if (i->get(26, 26) && i->get(23, 23)) {
+          // SIMD Q Type - Size = 128 bits
+          assert(size == 0, "bad size");
+          size = 0b100;
+        }
         if (size == 0) // It's a byte
           i->f(_ext.shift() >= 0, 12);
         else {
           if (_ext.shift() > 0)
             assert(_ext.shift() == (int)size, "bad shift");