474 unsigned mask = (1 << size) - 1;
475 if (_offset < 0 || _offset & mask)
476 {
477 i->f(0b00, 25, 24);
478 i->f(0, 21), i->f(0b00, 11, 10);
479 i->sf(_offset, 20, 12);
480 } else {
481 i->f(0b01, 25, 24);
482 i->f(_offset >> size, 21, 10);
483 }
484 }
485 break;
486
487 case base_plus_offset_reg:
488 {
489 i->f(0b00, 25, 24);
490 i->f(1, 21);
491 i->rf(_index, 16);
492 i->f(_ext.option(), 15, 13);
493 unsigned size = i->get(31, 30);
494 if (size == 0) // It's a byte
495 i->f(_ext.shift() >= 0, 12);
496 else {
497 if (_ext.shift() > 0)
498 assert(_ext.shift() == (int)size, "bad shift");
499 i->f(_ext.shift() > 0, 12);
500 }
501 i->f(0b10, 11, 10);
502 }
503 break;
504
505 case pre:
506 i->f(0b00, 25, 24);
507 i->f(0, 21), i->f(0b11, 11, 10);
508 i->sf(_offset, 20, 12);
509 break;
510
511 case post:
512 i->f(0b00, 25, 24);
513 i->f(0, 21), i->f(0b01, 11, 10);
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474 unsigned mask = (1 << size) - 1;
475 if (_offset < 0 || _offset & mask)
476 {
477 i->f(0b00, 25, 24);
478 i->f(0, 21), i->f(0b00, 11, 10);
479 i->sf(_offset, 20, 12);
480 } else {
481 i->f(0b01, 25, 24);
482 i->f(_offset >> size, 21, 10);
483 }
484 }
485 break;
486
487 case base_plus_offset_reg:
488 {
489 i->f(0b00, 25, 24);
490 i->f(1, 21);
491 i->rf(_index, 16);
492 i->f(_ext.option(), 15, 13);
493 unsigned size = i->get(31, 30);
494 if (i->get(26, 26) && i->get(23, 23)) {
495 // SIMD Q Type - Size = 128 bits
496 assert(size == 0, "bad size");
497 size = 0b100;
498 }
499 if (size == 0) // It's a byte
500 i->f(_ext.shift() >= 0, 12);
501 else {
502 if (_ext.shift() > 0)
503 assert(_ext.shift() == (int)size, "bad shift");
504 i->f(_ext.shift() > 0, 12);
505 }
506 i->f(0b10, 11, 10);
507 }
508 break;
509
510 case pre:
511 i->f(0b00, 25, 24);
512 i->f(0, 21), i->f(0b11, 11, 10);
513 i->sf(_offset, 20, 12);
514 break;
515
516 case post:
517 i->f(0b00, 25, 24);
518 i->f(0, 21), i->f(0b01, 11, 10);
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