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src/cpu/aarch64/vm/vm_version_aarch64.cpp

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rev 8431 : 8081790: aarch64: SHA tests fail
Summary: Fix SHA tests in JTReg so they recognize aarch64
Reviewed-by: duke
Contributed-by: alexander.alexeev@caviumnetworks.com


 211     if (auxv & HWCAP_SHA1) {
 212       if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) {
 213         FLAG_SET_DEFAULT(UseSHA1Intrinsics, true);
 214       }
 215     } else if (UseSHA1Intrinsics) {
 216       warning("SHA1 instruction is not available on this CPU.");
 217       FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
 218     }
 219     if (auxv & HWCAP_SHA2) {
 220       if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) {
 221         FLAG_SET_DEFAULT(UseSHA256Intrinsics, true);
 222       }
 223     } else if (UseSHA256Intrinsics) {
 224       warning("SHA256 instruction (for SHA-224 and SHA-256) is not available on this CPU.");
 225       FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
 226     }
 227     if (UseSHA512Intrinsics) {
 228       warning("SHA512 instruction (for SHA-384 and SHA-512) is not available on this CPU.");
 229       FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
 230     }



 231   }
 232 
 233   // This machine allows unaligned memory accesses
 234   if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) {
 235     FLAG_SET_DEFAULT(UseUnalignedAccesses, true);
 236   }
 237 
 238   if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
 239     UseMultiplyToLenIntrinsic = true;
 240   }
 241 
 242   if (FLAG_IS_DEFAULT(UseBarriersForVolatile)) {
 243     UseBarriersForVolatile = (_cpuFeatures & CPU_DMB_ATOMICS) != 0;
 244   }
 245 
 246 #ifdef COMPILER2
 247   if (FLAG_IS_DEFAULT(OptoScheduling)) {
 248     OptoScheduling = true;
 249   }
 250 #endif


 211     if (auxv & HWCAP_SHA1) {
 212       if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) {
 213         FLAG_SET_DEFAULT(UseSHA1Intrinsics, true);
 214       }
 215     } else if (UseSHA1Intrinsics) {
 216       warning("SHA1 instruction is not available on this CPU.");
 217       FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
 218     }
 219     if (auxv & HWCAP_SHA2) {
 220       if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) {
 221         FLAG_SET_DEFAULT(UseSHA256Intrinsics, true);
 222       }
 223     } else if (UseSHA256Intrinsics) {
 224       warning("SHA256 instruction (for SHA-224 and SHA-256) is not available on this CPU.");
 225       FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
 226     }
 227     if (UseSHA512Intrinsics) {
 228       warning("SHA512 instruction (for SHA-384 and SHA-512) is not available on this CPU.");
 229       FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
 230     }
 231     if (!(UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics)) {
 232       FLAG_SET_DEFAULT(UseSHA, false);
 233     }
 234   }
 235 
 236   // This machine allows unaligned memory accesses
 237   if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) {
 238     FLAG_SET_DEFAULT(UseUnalignedAccesses, true);
 239   }
 240 
 241   if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) {
 242     UseMultiplyToLenIntrinsic = true;
 243   }
 244 
 245   if (FLAG_IS_DEFAULT(UseBarriersForVolatile)) {
 246     UseBarriersForVolatile = (_cpuFeatures & CPU_DMB_ATOMICS) != 0;
 247   }
 248 
 249 #ifdef COMPILER2
 250   if (FLAG_IS_DEFAULT(OptoScheduling)) {
 251     OptoScheduling = true;
 252   }
 253 #endif
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