59 }
60 break;
61 }
62 case T_BOOLEAN: __ load_unsigned_byte (dst, src); break;
63 case T_BYTE: __ load_signed_byte (dst, src); break;
64 case T_CHAR: __ load_unsigned_short(dst, src); break;
65 case T_SHORT: __ load_signed_short (dst, src); break;
66 case T_INT: __ ldrw (dst, src); break;
67 case T_LONG: __ ldr (dst, src); break;
68 case T_ADDRESS: __ ldr (dst, src); break;
69 case T_FLOAT: __ ldrs (v0, src); break;
70 case T_DOUBLE: __ ldrd (v0, src); break;
71 default: Unimplemented();
72 }
73 }
74
75 void BarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
76 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
77 bool in_heap = (decorators & IN_HEAP) != 0;
78 bool in_native = (decorators & IN_NATIVE) != 0;
79 switch (type) {
80 case T_OBJECT:
81 case T_ARRAY: {
82 val = val == noreg ? zr : val;
83 if (in_heap) {
84 if (UseCompressedOops) {
85 assert(!dst.uses(val), "not enough registers");
86 if (val != zr) {
87 __ encode_heap_oop(val);
88 }
89 __ strw(val, dst);
90 } else {
91 __ str(val, dst);
92 }
93 } else {
94 assert(in_native, "why else?");
95 __ str(val, dst);
96 }
97 break;
98 }
99 case T_BOOLEAN:
100 __ andw(val, val, 0x1); // boolean is true if LSB is 1
101 __ strb(val, dst);
102 break;
103 case T_BYTE: __ strb(val, dst); break;
104 case T_CHAR: __ strh(val, dst); break;
105 case T_SHORT: __ strh(val, dst); break;
106 case T_INT: __ strw(val, dst); break;
107 case T_LONG: __ str (val, dst); break;
108 case T_ADDRESS: __ str (val, dst); break;
109 case T_FLOAT: __ strs(v0, dst); break;
110 case T_DOUBLE: __ strd(v0, dst); break;
111 default: Unimplemented();
112 }
113 }
114
214 incr_allocated_bytes(masm, var_size_in_bytes, con_size_in_bytes, t1);
215 }
216 }
217
218 void BarrierSetAssembler::incr_allocated_bytes(MacroAssembler* masm,
219 Register var_size_in_bytes,
220 int con_size_in_bytes,
221 Register t1) {
222 assert(t1->is_valid(), "need temp reg");
223
224 __ ldr(t1, Address(rthread, in_bytes(JavaThread::allocated_bytes_offset())));
225 if (var_size_in_bytes->is_valid()) {
226 __ add(t1, t1, var_size_in_bytes);
227 } else {
228 __ add(t1, t1, con_size_in_bytes);
229 }
230 __ str(t1, Address(rthread, in_bytes(JavaThread::allocated_bytes_offset())));
231 }
232
233 void BarrierSetAssembler::nmethod_entry_barrier(MacroAssembler* masm) {
234 // DMS CHECK: 8210498: nmethod entry barriers is not implemented
235 #if 0
236 BarrierSetNMethod* bs_nm = BarrierSet::barrier_set()->barrier_set_nmethod();
237 if (bs_nm == NULL) {
238 return;
239 }
240 Label continuation;
241 Address disarmed_addr(rthread, in_bytes(bs_nm->thread_disarmed_offset()));
242 __ align(8);
243 __ ldr(rscratch1, disarmed_addr);
244 __ cbz(rscratch1, continuation);
245 __ blr(RuntimeAddress(StubRoutines::aarch64::method_entry_barrier()));
246 __ bind(continuation);
247 #endif
248 }
249
|
59 }
60 break;
61 }
62 case T_BOOLEAN: __ load_unsigned_byte (dst, src); break;
63 case T_BYTE: __ load_signed_byte (dst, src); break;
64 case T_CHAR: __ load_unsigned_short(dst, src); break;
65 case T_SHORT: __ load_signed_short (dst, src); break;
66 case T_INT: __ ldrw (dst, src); break;
67 case T_LONG: __ ldr (dst, src); break;
68 case T_ADDRESS: __ ldr (dst, src); break;
69 case T_FLOAT: __ ldrs (v0, src); break;
70 case T_DOUBLE: __ ldrd (v0, src); break;
71 default: Unimplemented();
72 }
73 }
74
75 void BarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
76 Address dst, Register val, Register tmp1, Register tmp2, Register tmp3) {
77 bool in_heap = (decorators & IN_HEAP) != 0;
78 bool in_native = (decorators & IN_NATIVE) != 0;
79 bool is_not_null = (decorators & IS_NOT_NULL) != 0;
80
81 switch (type) {
82 case T_OBJECT:
83 case T_ARRAY: {
84 if (in_heap) {
85 if (val == noreg) {
86 assert(!is_not_null, "inconsistent access");
87 if (UseCompressedOops) {
88 __ strw(zr, dst);
89 } else {
90 __ str(zr, dst);
91 }
92 } else {
93 if (UseCompressedOops) {
94 assert(!dst.uses(val), "not enough registers");
95 if (is_not_null) {
96 __ encode_heap_oop_not_null(val);
97 } else {
98 __ encode_heap_oop(val);
99 }
100 __ strw(val, dst);
101 } else {
102 __ str(val, dst);
103 }
104 }
105 } else {
106 assert(in_native, "why else?");
107 assert(val != noreg, "not supported");
108 __ str(val, dst);
109 }
110 break;
111 }
112 case T_BOOLEAN:
113 __ andw(val, val, 0x1); // boolean is true if LSB is 1
114 __ strb(val, dst);
115 break;
116 case T_BYTE: __ strb(val, dst); break;
117 case T_CHAR: __ strh(val, dst); break;
118 case T_SHORT: __ strh(val, dst); break;
119 case T_INT: __ strw(val, dst); break;
120 case T_LONG: __ str (val, dst); break;
121 case T_ADDRESS: __ str (val, dst); break;
122 case T_FLOAT: __ strs(v0, dst); break;
123 case T_DOUBLE: __ strd(v0, dst); break;
124 default: Unimplemented();
125 }
126 }
127
227 incr_allocated_bytes(masm, var_size_in_bytes, con_size_in_bytes, t1);
228 }
229 }
230
231 void BarrierSetAssembler::incr_allocated_bytes(MacroAssembler* masm,
232 Register var_size_in_bytes,
233 int con_size_in_bytes,
234 Register t1) {
235 assert(t1->is_valid(), "need temp reg");
236
237 __ ldr(t1, Address(rthread, in_bytes(JavaThread::allocated_bytes_offset())));
238 if (var_size_in_bytes->is_valid()) {
239 __ add(t1, t1, var_size_in_bytes);
240 } else {
241 __ add(t1, t1, con_size_in_bytes);
242 }
243 __ str(t1, Address(rthread, in_bytes(JavaThread::allocated_bytes_offset())));
244 }
245
246 void BarrierSetAssembler::nmethod_entry_barrier(MacroAssembler* masm) {
247 // FIXME: 8210498: nmethod entry barriers is not implemented
248 #if 0
249 BarrierSetNMethod* bs_nm = BarrierSet::barrier_set()->barrier_set_nmethod();
250 if (bs_nm == NULL) {
251 return;
252 }
253 Label continuation;
254 Address disarmed_addr(rthread, in_bytes(bs_nm->thread_disarmed_offset()));
255 __ align(8);
256 __ ldr(rscratch1, disarmed_addr);
257 __ cbz(rscratch1, continuation);
258 __ blr(RuntimeAddress(StubRoutines::aarch64::method_entry_barrier()));
259 __ bind(continuation);
260 #endif
261 }
262
|