28 #include "c1/c1_LIR.hpp"
29 #include "runtime/sharedRuntime.hpp"
30 #include "vmreg_aarch64.inline.hpp"
31
32 LIR_Opr FrameMap::map_to_opr(BasicType type, VMRegPair* reg, bool) {
33 LIR_Opr opr = LIR_OprFact::illegalOpr;
34 VMReg r_1 = reg->first();
35 VMReg r_2 = reg->second();
36 if (r_1->is_stack()) {
37 // Convert stack slot to an SP offset
38 // The calling convention does not count the SharedRuntime::out_preserve_stack_slots() value
39 // so we must add it in here.
40 int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
41 opr = LIR_OprFact::address(new LIR_Address(sp_opr, st_off, type));
42 } else if (r_1->is_Register()) {
43 Register reg = r_1->as_Register();
44 if (r_2->is_Register() && (type == T_LONG || type == T_DOUBLE)) {
45 Register reg2 = r_2->as_Register();
46 assert(reg2 == reg, "must be same register");
47 opr = as_long_opr(reg);
48 } else if (type == T_OBJECT || type == T_ARRAY) {
49 opr = as_oop_opr(reg);
50 } else if (type == T_METADATA) {
51 opr = as_metadata_opr(reg);
52 } else {
53 opr = as_opr(reg);
54 }
55 } else if (r_1->is_FloatRegister()) {
56 assert(type == T_DOUBLE || type == T_FLOAT, "wrong type");
57 int num = r_1->as_FloatRegister()->encoding();
58 if (type == T_FLOAT) {
59 opr = LIR_OprFact::single_fpu(num);
60 } else {
61 opr = LIR_OprFact::double_fpu(num);
62 }
63 } else {
64 ShouldNotReachHere();
65 }
66 return opr;
67 }
68
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28 #include "c1/c1_LIR.hpp"
29 #include "runtime/sharedRuntime.hpp"
30 #include "vmreg_aarch64.inline.hpp"
31
32 LIR_Opr FrameMap::map_to_opr(BasicType type, VMRegPair* reg, bool) {
33 LIR_Opr opr = LIR_OprFact::illegalOpr;
34 VMReg r_1 = reg->first();
35 VMReg r_2 = reg->second();
36 if (r_1->is_stack()) {
37 // Convert stack slot to an SP offset
38 // The calling convention does not count the SharedRuntime::out_preserve_stack_slots() value
39 // so we must add it in here.
40 int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
41 opr = LIR_OprFact::address(new LIR_Address(sp_opr, st_off, type));
42 } else if (r_1->is_Register()) {
43 Register reg = r_1->as_Register();
44 if (r_2->is_Register() && (type == T_LONG || type == T_DOUBLE)) {
45 Register reg2 = r_2->as_Register();
46 assert(reg2 == reg, "must be same register");
47 opr = as_long_opr(reg);
48 } else if (type == T_OBJECT || type == T_ARRAY || type == T_VALUETYPE) {
49 opr = as_oop_opr(reg);
50 } else if (type == T_METADATA) {
51 opr = as_metadata_opr(reg);
52 } else {
53 opr = as_opr(reg);
54 }
55 } else if (r_1->is_FloatRegister()) {
56 assert(type == T_DOUBLE || type == T_FLOAT, "wrong type");
57 int num = r_1->as_FloatRegister()->encoding();
58 if (type == T_FLOAT) {
59 opr = LIR_OprFact::single_fpu(num);
60 } else {
61 opr = LIR_OprFact::double_fpu(num);
62 }
63 } else {
64 ShouldNotReachHere();
65 }
66 return opr;
67 }
68
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