1 /*
   2  * Copyright (c) 2000, 2014, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_InstructionPrinter.hpp"
  27 #include "c1/c1_LIR.hpp"
  28 #include "c1/c1_LIRAssembler.hpp"
  29 #include "c1/c1_ValueStack.hpp"
  30 #include "ci/ciInstance.hpp"
  31 #include "runtime/sharedRuntime.hpp"
  32 
  33 Register LIR_OprDesc::as_register() const {
  34   return FrameMap::cpu_rnr2reg(cpu_regnr());
  35 }
  36 
  37 Register LIR_OprDesc::as_register_lo() const {
  38   return FrameMap::cpu_rnr2reg(cpu_regnrLo());
  39 }
  40 
  41 Register LIR_OprDesc::as_register_hi() const {
  42   return FrameMap::cpu_rnr2reg(cpu_regnrHi());
  43 }
  44 
  45 #if defined(X86)
  46 
  47 XMMRegister LIR_OprDesc::as_xmm_float_reg() const {
  48   return FrameMap::nr2xmmreg(xmm_regnr());
  49 }
  50 
  51 XMMRegister LIR_OprDesc::as_xmm_double_reg() const {
  52   assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation");
  53   return FrameMap::nr2xmmreg(xmm_regnrLo());
  54 }
  55 
  56 #endif // X86
  57 
  58 #if defined(SPARC) || defined(PPC)
  59 
  60 FloatRegister LIR_OprDesc::as_float_reg() const {
  61   return FrameMap::nr2floatreg(fpu_regnr());
  62 }
  63 
  64 FloatRegister LIR_OprDesc::as_double_reg() const {
  65   return FrameMap::nr2floatreg(fpu_regnrHi());
  66 }
  67 
  68 #endif
  69 
  70 #ifdef ARM
  71 
  72 FloatRegister LIR_OprDesc::as_float_reg() const {
  73   return as_FloatRegister(fpu_regnr());
  74 }
  75 
  76 FloatRegister LIR_OprDesc::as_double_reg() const {
  77   return as_FloatRegister(fpu_regnrLo());
  78 }
  79 
  80 #endif
  81 
  82 
  83 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
  84 
  85 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
  86   ValueTag tag = type->tag();
  87   switch (tag) {
  88   case metaDataTag : {
  89     ClassConstant* c = type->as_ClassConstant();
  90     if (c != NULL && !c->value()->is_loaded()) {
  91       return LIR_OprFact::metadataConst(NULL);
  92     } else if (c != NULL) {
  93       return LIR_OprFact::metadataConst(c->value()->constant_encoding());
  94     } else {
  95       MethodConstant* m = type->as_MethodConstant();
  96       assert (m != NULL, "not a class or a method?");
  97       return LIR_OprFact::metadataConst(m->value()->constant_encoding());
  98     }
  99   }
 100   case objectTag : {
 101       return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
 102     }
 103   case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
 104   case intTag    : return LIR_OprFact::intConst(type->as_IntConstant()->value());
 105   case floatTag  : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
 106   case longTag   : return LIR_OprFact::longConst(type->as_LongConstant()->value());
 107   case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
 108   default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
 109   }
 110 }
 111 
 112 
 113 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
 114   switch (type->tag()) {
 115     case objectTag: return LIR_OprFact::oopConst(NULL);
 116     case addressTag:return LIR_OprFact::addressConst(0);
 117     case intTag:    return LIR_OprFact::intConst(0);
 118     case floatTag:  return LIR_OprFact::floatConst(0.0);
 119     case longTag:   return LIR_OprFact::longConst(0);
 120     case doubleTag: return LIR_OprFact::doubleConst(0.0);
 121     default:        ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
 122   }
 123   return illegalOpr;
 124 }
 125 
 126 
 127 
 128 //---------------------------------------------------
 129 
 130 
 131 LIR_Address::Scale LIR_Address::scale(BasicType type) {
 132   int elem_size = type2aelembytes(type);
 133   switch (elem_size) {
 134   case 1: return LIR_Address::times_1;
 135   case 2: return LIR_Address::times_2;
 136   case 4: return LIR_Address::times_4;
 137   case 8: return LIR_Address::times_8;
 138   }
 139   ShouldNotReachHere();
 140   return LIR_Address::times_1;
 141 }
 142 
 143 
 144 #ifndef PRODUCT
 145 void LIR_Address::verify0() const {
 146 #if defined(SPARC) || defined(PPC)
 147   assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used");
 148   assert(disp() == 0 || index()->is_illegal(), "can't have both");
 149 #endif
 150 #ifdef _LP64
 151   assert(base()->is_cpu_register(), "wrong base operand");
 152   assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand");
 153   assert(base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA,
 154          "wrong type for addresses");
 155 #else
 156   assert(base()->is_single_cpu(), "wrong base operand");
 157   assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand");
 158   assert(base()->type() == T_OBJECT || base()->type() == T_INT || base()->type() == T_METADATA,
 159          "wrong type for addresses");
 160 #endif
 161 }
 162 #endif
 163 
 164 
 165 //---------------------------------------------------
 166 
 167 char LIR_OprDesc::type_char(BasicType t) {
 168   switch (t) {
 169     case T_ARRAY:
 170       t = T_OBJECT;
 171     case T_BOOLEAN:
 172     case T_CHAR:
 173     case T_FLOAT:
 174     case T_DOUBLE:
 175     case T_BYTE:
 176     case T_SHORT:
 177     case T_INT:
 178     case T_LONG:
 179     case T_OBJECT:
 180     case T_ADDRESS:
 181     case T_VOID:
 182       return ::type2char(t);
 183     case T_METADATA:
 184       return 'M';
 185     case T_ILLEGAL:
 186       return '?';
 187 
 188     default:
 189       ShouldNotReachHere();
 190       return '?';
 191   }
 192 }
 193 
 194 #ifndef PRODUCT
 195 void LIR_OprDesc::validate_type() const {
 196 
 197 #ifdef ASSERT
 198   if (!is_pointer() && !is_illegal()) {
 199     OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
 200     switch (as_BasicType(type_field())) {
 201     case T_LONG:
 202       assert((kindfield == cpu_register || kindfield == stack_value) &&
 203              size_field() == double_size, "must match");
 204       break;
 205     case T_FLOAT:
 206       // FP return values can be also in CPU registers on ARM and PPC (softfp ABI)
 207       assert((kindfield == fpu_register || kindfield == stack_value
 208              ARM_ONLY(|| kindfield == cpu_register)
 209              PPC_ONLY(|| kindfield == cpu_register) ) &&
 210              size_field() == single_size, "must match");
 211       break;
 212     case T_DOUBLE:
 213       // FP return values can be also in CPU registers on ARM and PPC (softfp ABI)
 214       assert((kindfield == fpu_register || kindfield == stack_value
 215              ARM_ONLY(|| kindfield == cpu_register)
 216              PPC_ONLY(|| kindfield == cpu_register) ) &&
 217              size_field() == double_size, "must match");
 218       break;
 219     case T_BOOLEAN:
 220     case T_CHAR:
 221     case T_BYTE:
 222     case T_SHORT:
 223     case T_INT:
 224     case T_ADDRESS:
 225     case T_OBJECT:
 226     case T_METADATA:
 227     case T_ARRAY:
 228       assert((kindfield == cpu_register || kindfield == stack_value) &&
 229              size_field() == single_size, "must match");
 230       break;
 231 
 232     case T_ILLEGAL:
 233       // XXX TKR also means unknown right now
 234       // assert(is_illegal(), "must match");
 235       break;
 236 
 237     default:
 238       ShouldNotReachHere();
 239     }
 240   }
 241 #endif
 242 
 243 }
 244 #endif // PRODUCT
 245 
 246 
 247 bool LIR_OprDesc::is_oop() const {
 248   if (is_pointer()) {
 249     return pointer()->is_oop_pointer();
 250   } else {
 251     OprType t= type_field();
 252     assert(t != unknown_type, "not set");
 253     return t == object_type;
 254   }
 255 }
 256 
 257 
 258 
 259 void LIR_Op2::verify() const {
 260 #ifdef ASSERT
 261   switch (code()) {
 262     case lir_cmove:
 263     case lir_xchg:
 264       break;
 265 
 266     default:
 267       assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
 268              "can't produce oops from arith");
 269   }
 270 
 271   if (TwoOperandLIRForm) {
 272     switch (code()) {
 273     case lir_add:
 274     case lir_sub:
 275     case lir_mul:
 276     case lir_mul_strictfp:
 277     case lir_div:
 278     case lir_div_strictfp:
 279     case lir_rem:
 280     case lir_logic_and:
 281     case lir_logic_or:
 282     case lir_logic_xor:
 283     case lir_shl:
 284     case lir_shr:
 285       assert(in_opr1() == result_opr(), "opr1 and result must match");
 286       assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
 287       break;
 288 
 289     // special handling for lir_ushr because of write barriers
 290     case lir_ushr:
 291       assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant");
 292       assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
 293       break;
 294 
 295     }
 296   }
 297 #endif
 298 }
 299 
 300 
 301 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
 302   : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
 303   , _cond(cond)
 304   , _type(type)
 305   , _label(block->label())
 306   , _block(block)
 307   , _ublock(NULL)
 308   , _stub(NULL) {
 309 }
 310 
 311 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
 312   LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
 313   , _cond(cond)
 314   , _type(type)
 315   , _label(stub->entry())
 316   , _block(NULL)
 317   , _ublock(NULL)
 318   , _stub(stub) {
 319 }
 320 
 321 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
 322   : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
 323   , _cond(cond)
 324   , _type(type)
 325   , _label(block->label())
 326   , _block(block)
 327   , _ublock(ublock)
 328   , _stub(NULL)
 329 {
 330 }
 331 
 332 void LIR_OpBranch::change_block(BlockBegin* b) {
 333   assert(_block != NULL, "must have old block");
 334   assert(_block->label() == label(), "must be equal");
 335 
 336   _block = b;
 337   _label = b->label();
 338 }
 339 
 340 void LIR_OpBranch::change_ublock(BlockBegin* b) {
 341   assert(_ublock != NULL, "must have old block");
 342   _ublock = b;
 343 }
 344 
 345 void LIR_OpBranch::negate_cond() {
 346   switch (_cond) {
 347     case lir_cond_equal:        _cond = lir_cond_notEqual;     break;
 348     case lir_cond_notEqual:     _cond = lir_cond_equal;        break;
 349     case lir_cond_less:         _cond = lir_cond_greaterEqual; break;
 350     case lir_cond_lessEqual:    _cond = lir_cond_greater;      break;
 351     case lir_cond_greaterEqual: _cond = lir_cond_less;         break;
 352     case lir_cond_greater:      _cond = lir_cond_lessEqual;    break;
 353     default: ShouldNotReachHere();
 354   }
 355 }
 356 
 357 
 358 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
 359                                  LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
 360                                  bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
 361                                  CodeStub* stub)
 362 
 363   : LIR_Op(code, result, NULL)
 364   , _object(object)
 365   , _array(LIR_OprFact::illegalOpr)
 366   , _klass(klass)
 367   , _tmp1(tmp1)
 368   , _tmp2(tmp2)
 369   , _tmp3(tmp3)
 370   , _fast_check(fast_check)
 371   , _stub(stub)
 372   , _info_for_patch(info_for_patch)
 373   , _info_for_exception(info_for_exception)
 374   , _profiled_method(NULL)
 375   , _profiled_bci(-1)
 376   , _should_profile(false)
 377 {
 378   if (code == lir_checkcast) {
 379     assert(info_for_exception != NULL, "checkcast throws exceptions");
 380   } else if (code == lir_instanceof) {
 381     assert(info_for_exception == NULL, "instanceof throws no exceptions");
 382   } else {
 383     ShouldNotReachHere();
 384   }
 385 }
 386 
 387 
 388 
 389 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
 390   : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
 391   , _object(object)
 392   , _array(array)
 393   , _klass(NULL)
 394   , _tmp1(tmp1)
 395   , _tmp2(tmp2)
 396   , _tmp3(tmp3)
 397   , _fast_check(false)
 398   , _stub(NULL)
 399   , _info_for_patch(NULL)
 400   , _info_for_exception(info_for_exception)
 401   , _profiled_method(NULL)
 402   , _profiled_bci(-1)
 403   , _should_profile(false)
 404 {
 405   if (code == lir_store_check) {
 406     _stub = new ArrayStoreExceptionStub(object, info_for_exception);
 407     assert(info_for_exception != NULL, "store_check throws exceptions");
 408   } else {
 409     ShouldNotReachHere();
 410   }
 411 }
 412 
 413 
 414 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
 415                                  LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
 416   : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
 417   , _tmp(tmp)
 418   , _src(src)
 419   , _src_pos(src_pos)
 420   , _dst(dst)
 421   , _dst_pos(dst_pos)
 422   , _flags(flags)
 423   , _expected_type(expected_type)
 424   , _length(length) {
 425   _stub = new ArrayCopyStub(this);
 426 }
 427 
 428 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
 429   : LIR_Op(lir_updatecrc32, res, NULL)
 430   , _crc(crc)
 431   , _val(val) {
 432 }
 433 
 434 //-------------------verify--------------------------
 435 
 436 void LIR_Op1::verify() const {
 437   switch(code()) {
 438   case lir_move:
 439     assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
 440     break;
 441   case lir_null_check:
 442     assert(in_opr()->is_register(), "must be");
 443     break;
 444   case lir_return:
 445     assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
 446     break;
 447   }
 448 }
 449 
 450 void LIR_OpRTCall::verify() const {
 451   assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
 452 }
 453 
 454 //-------------------visits--------------------------
 455 
 456 // complete rework of LIR instruction visitor.
 457 // The virtual calls for each instruction type is replaced by a big
 458 // switch that adds the operands for each instruction
 459 
 460 void LIR_OpVisitState::visit(LIR_Op* op) {
 461   // copy information from the LIR_Op
 462   reset();
 463   set_op(op);
 464 
 465   switch (op->code()) {
 466 
 467 // LIR_Op0
 468     case lir_word_align:               // result and info always invalid
 469     case lir_backwardbranch_target:    // result and info always invalid
 470     case lir_build_frame:              // result and info always invalid
 471     case lir_fpop_raw:                 // result and info always invalid
 472     case lir_24bit_FPU:                // result and info always invalid
 473     case lir_reset_FPU:                // result and info always invalid
 474     case lir_breakpoint:               // result and info always invalid
 475     case lir_membar:                   // result and info always invalid
 476     case lir_membar_acquire:           // result and info always invalid
 477     case lir_membar_release:           // result and info always invalid
 478     case lir_membar_loadload:          // result and info always invalid
 479     case lir_membar_storestore:        // result and info always invalid
 480     case lir_membar_loadstore:         // result and info always invalid
 481     case lir_membar_storeload:         // result and info always invalid
 482     {
 483       assert(op->as_Op0() != NULL, "must be");
 484       assert(op->_info == NULL, "info not used by this instruction");
 485       assert(op->_result->is_illegal(), "not used");
 486       break;
 487     }
 488 
 489     case lir_nop:                      // may have info, result always invalid
 490     case lir_std_entry:                // may have result, info always invalid
 491     case lir_osr_entry:                // may have result, info always invalid
 492     case lir_get_thread:               // may have result, info always invalid
 493     {
 494       assert(op->as_Op0() != NULL, "must be");
 495       if (op->_info != NULL)           do_info(op->_info);
 496       if (op->_result->is_valid())     do_output(op->_result);
 497       break;
 498     }
 499 
 500 
 501 // LIR_OpLabel
 502     case lir_label:                    // result and info always invalid
 503     {
 504       assert(op->as_OpLabel() != NULL, "must be");
 505       assert(op->_info == NULL, "info not used by this instruction");
 506       assert(op->_result->is_illegal(), "not used");
 507       break;
 508     }
 509 
 510 
 511 // LIR_Op1
 512     case lir_fxch:           // input always valid, result and info always invalid
 513     case lir_fld:            // input always valid, result and info always invalid
 514     case lir_ffree:          // input always valid, result and info always invalid
 515     case lir_push:           // input always valid, result and info always invalid
 516     case lir_pop:            // input always valid, result and info always invalid
 517     case lir_return:         // input always valid, result and info always invalid
 518     case lir_leal:           // input and result always valid, info always invalid
 519     case lir_neg:            // input and result always valid, info always invalid
 520     case lir_monaddr:        // input and result always valid, info always invalid
 521     case lir_null_check:     // input and info always valid, result always invalid
 522     case lir_move:           // input and result always valid, may have info
 523     case lir_pack64:         // input and result always valid
 524     case lir_unpack64:       // input and result always valid
 525     case lir_prefetchr:      // input always valid, result and info always invalid
 526     case lir_prefetchw:      // input always valid, result and info always invalid
 527     {
 528       assert(op->as_Op1() != NULL, "must be");
 529       LIR_Op1* op1 = (LIR_Op1*)op;
 530 
 531       if (op1->_info)                  do_info(op1->_info);
 532       if (op1->_opr->is_valid())       do_input(op1->_opr);
 533       if (op1->_result->is_valid())    do_output(op1->_result);
 534 
 535       break;
 536     }
 537 
 538     case lir_safepoint:
 539     {
 540       assert(op->as_Op1() != NULL, "must be");
 541       LIR_Op1* op1 = (LIR_Op1*)op;
 542 
 543       assert(op1->_info != NULL, "");  do_info(op1->_info);
 544       if (op1->_opr->is_valid())       do_temp(op1->_opr); // safepoints on SPARC need temporary register
 545       assert(op1->_result->is_illegal(), "safepoint does not produce value");
 546 
 547       break;
 548     }
 549 
 550 // LIR_OpConvert;
 551     case lir_convert:        // input and result always valid, info always invalid
 552     {
 553       assert(op->as_OpConvert() != NULL, "must be");
 554       LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
 555 
 556       assert(opConvert->_info == NULL, "must be");
 557       if (opConvert->_opr->is_valid())       do_input(opConvert->_opr);
 558       if (opConvert->_result->is_valid())    do_output(opConvert->_result);
 559 #ifdef PPC
 560       if (opConvert->_tmp1->is_valid())      do_temp(opConvert->_tmp1);
 561       if (opConvert->_tmp2->is_valid())      do_temp(opConvert->_tmp2);
 562 #endif
 563       do_stub(opConvert->_stub);
 564 
 565       break;
 566     }
 567 
 568 // LIR_OpBranch;
 569     case lir_branch:                   // may have info, input and result register always invalid
 570     case lir_cond_float_branch:        // may have info, input and result register always invalid
 571     {
 572       assert(op->as_OpBranch() != NULL, "must be");
 573       LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
 574 
 575       if (opBranch->_info != NULL)     do_info(opBranch->_info);
 576       assert(opBranch->_result->is_illegal(), "not used");
 577       if (opBranch->_stub != NULL)     opBranch->stub()->visit(this);
 578 
 579       break;
 580     }
 581 
 582 
 583 // LIR_OpAllocObj
 584     case lir_alloc_object:
 585     {
 586       assert(op->as_OpAllocObj() != NULL, "must be");
 587       LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
 588 
 589       if (opAllocObj->_info)                     do_info(opAllocObj->_info);
 590       if (opAllocObj->_opr->is_valid()) {        do_input(opAllocObj->_opr);
 591                                                  do_temp(opAllocObj->_opr);
 592                                         }
 593       if (opAllocObj->_tmp1->is_valid())         do_temp(opAllocObj->_tmp1);
 594       if (opAllocObj->_tmp2->is_valid())         do_temp(opAllocObj->_tmp2);
 595       if (opAllocObj->_tmp3->is_valid())         do_temp(opAllocObj->_tmp3);
 596       if (opAllocObj->_tmp4->is_valid())         do_temp(opAllocObj->_tmp4);
 597       if (opAllocObj->_result->is_valid())       do_output(opAllocObj->_result);
 598                                                  do_stub(opAllocObj->_stub);
 599       break;
 600     }
 601 
 602 
 603 // LIR_OpRoundFP;
 604     case lir_roundfp: {
 605       assert(op->as_OpRoundFP() != NULL, "must be");
 606       LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
 607 
 608       assert(op->_info == NULL, "info not used by this instruction");
 609       assert(opRoundFP->_tmp->is_illegal(), "not used");
 610       do_input(opRoundFP->_opr);
 611       do_output(opRoundFP->_result);
 612 
 613       break;
 614     }
 615 
 616 
 617 // LIR_Op2
 618     case lir_cmp:
 619     case lir_cmp_l2i:
 620     case lir_ucmp_fd2i:
 621     case lir_cmp_fd2i:
 622     case lir_add:
 623     case lir_sub:
 624     case lir_mul:
 625     case lir_div:
 626     case lir_rem:
 627     case lir_sqrt:
 628     case lir_abs:
 629     case lir_logic_and:
 630     case lir_logic_or:
 631     case lir_logic_xor:
 632     case lir_shl:
 633     case lir_shr:
 634     case lir_ushr:
 635     case lir_xadd:
 636     case lir_xchg:
 637     case lir_assert:
 638     {
 639       assert(op->as_Op2() != NULL, "must be");
 640       LIR_Op2* op2 = (LIR_Op2*)op;
 641       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 642              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 643 
 644       if (op2->_info)                     do_info(op2->_info);
 645       if (op2->_opr1->is_valid())         do_input(op2->_opr1);
 646       if (op2->_opr2->is_valid())         do_input(op2->_opr2);
 647       if (op2->_tmp1->is_valid())         do_temp(op2->_tmp1);
 648       if (op2->_result->is_valid())       do_output(op2->_result);
 649       if (op->code() == lir_xchg || op->code() == lir_xadd) {
 650         // on ARM and PPC, return value is loaded first so could
 651         // destroy inputs. On other platforms that implement those
 652         // (x86, sparc), the extra constrainsts are harmless.
 653         if (op2->_opr1->is_valid())       do_temp(op2->_opr1);
 654         if (op2->_opr2->is_valid())       do_temp(op2->_opr2);
 655       }
 656 
 657       break;
 658     }
 659 
 660     // special handling for cmove: right input operand must not be equal
 661     // to the result operand, otherwise the backend fails
 662     case lir_cmove:
 663     {
 664       assert(op->as_Op2() != NULL, "must be");
 665       LIR_Op2* op2 = (LIR_Op2*)op;
 666 
 667       assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
 668              op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 669       assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
 670 
 671       do_input(op2->_opr1);
 672       do_input(op2->_opr2);
 673       do_temp(op2->_opr2);
 674       do_output(op2->_result);
 675 
 676       break;
 677     }
 678 
 679     // vspecial handling for strict operations: register input operands
 680     // as temp to guarantee that they do not overlap with other
 681     // registers
 682     case lir_mul_strictfp:
 683     case lir_div_strictfp:
 684     {
 685       assert(op->as_Op2() != NULL, "must be");
 686       LIR_Op2* op2 = (LIR_Op2*)op;
 687 
 688       assert(op2->_info == NULL, "not used");
 689       assert(op2->_opr1->is_valid(), "used");
 690       assert(op2->_opr2->is_valid(), "used");
 691       assert(op2->_result->is_valid(), "used");
 692       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 693              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 694 
 695       do_input(op2->_opr1); do_temp(op2->_opr1);
 696       do_input(op2->_opr2); do_temp(op2->_opr2);
 697       if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
 698       do_output(op2->_result);
 699 
 700       break;
 701     }
 702 
 703     case lir_throw: {
 704       assert(op->as_Op2() != NULL, "must be");
 705       LIR_Op2* op2 = (LIR_Op2*)op;
 706 
 707       if (op2->_info)                     do_info(op2->_info);
 708       if (op2->_opr1->is_valid())         do_temp(op2->_opr1);
 709       if (op2->_opr2->is_valid())         do_input(op2->_opr2); // exception object is input parameter
 710       assert(op2->_result->is_illegal(), "no result");
 711       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 712              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 713 
 714       break;
 715     }
 716 
 717     case lir_unwind: {
 718       assert(op->as_Op1() != NULL, "must be");
 719       LIR_Op1* op1 = (LIR_Op1*)op;
 720 
 721       assert(op1->_info == NULL, "no info");
 722       assert(op1->_opr->is_valid(), "exception oop");         do_input(op1->_opr);
 723       assert(op1->_result->is_illegal(), "no result");
 724 
 725       break;
 726     }
 727 
 728 
 729     case lir_tan:
 730     case lir_sin:
 731     case lir_cos:
 732     case lir_log:
 733     case lir_log10:
 734     case lir_exp: {
 735       assert(op->as_Op2() != NULL, "must be");
 736       LIR_Op2* op2 = (LIR_Op2*)op;
 737 
 738       // On x86 tan/sin/cos need two temporary fpu stack slots and
 739       // log/log10 need one so handle opr2 and tmp as temp inputs.
 740       // Register input operand as temp to guarantee that it doesn't
 741       // overlap with the input.
 742       assert(op2->_info == NULL, "not used");
 743       assert(op2->_tmp5->is_illegal(), "not used");
 744       assert(op2->_tmp2->is_valid() == (op->code() == lir_exp), "not used");
 745       assert(op2->_tmp3->is_valid() == (op->code() == lir_exp), "not used");
 746       assert(op2->_tmp4->is_valid() == (op->code() == lir_exp), "not used");
 747       assert(op2->_opr1->is_valid(), "used");
 748       do_input(op2->_opr1); do_temp(op2->_opr1);
 749 
 750       if (op2->_opr2->is_valid())         do_temp(op2->_opr2);
 751       if (op2->_tmp1->is_valid())         do_temp(op2->_tmp1);
 752       if (op2->_tmp2->is_valid())         do_temp(op2->_tmp2);
 753       if (op2->_tmp3->is_valid())         do_temp(op2->_tmp3);
 754       if (op2->_tmp4->is_valid())         do_temp(op2->_tmp4);
 755       if (op2->_result->is_valid())       do_output(op2->_result);
 756 
 757       break;
 758     }
 759 
 760     case lir_pow: {
 761       assert(op->as_Op2() != NULL, "must be");
 762       LIR_Op2* op2 = (LIR_Op2*)op;
 763 
 764       // On x86 pow needs two temporary fpu stack slots: tmp1 and
 765       // tmp2. Register input operands as temps to guarantee that it
 766       // doesn't overlap with the temporary slots.
 767       assert(op2->_info == NULL, "not used");
 768       assert(op2->_opr1->is_valid() && op2->_opr2->is_valid(), "used");
 769       assert(op2->_tmp1->is_valid() && op2->_tmp2->is_valid() && op2->_tmp3->is_valid()
 770              && op2->_tmp4->is_valid() && op2->_tmp5->is_valid(), "used");
 771       assert(op2->_result->is_valid(), "used");
 772 
 773       do_input(op2->_opr1); do_temp(op2->_opr1);
 774       do_input(op2->_opr2); do_temp(op2->_opr2);
 775       do_temp(op2->_tmp1);
 776       do_temp(op2->_tmp2);
 777       do_temp(op2->_tmp3);
 778       do_temp(op2->_tmp4);
 779       do_temp(op2->_tmp5);
 780       do_output(op2->_result);
 781 
 782       break;
 783     }
 784 
 785 // LIR_Op3
 786     case lir_idiv:
 787     case lir_irem: {
 788       assert(op->as_Op3() != NULL, "must be");
 789       LIR_Op3* op3= (LIR_Op3*)op;
 790 
 791       if (op3->_info)                     do_info(op3->_info);
 792       if (op3->_opr1->is_valid())         do_input(op3->_opr1);
 793 
 794       // second operand is input and temp, so ensure that second operand
 795       // and third operand get not the same register
 796       if (op3->_opr2->is_valid())         do_input(op3->_opr2);
 797       if (op3->_opr2->is_valid())         do_temp(op3->_opr2);
 798       if (op3->_opr3->is_valid())         do_temp(op3->_opr3);
 799 
 800       if (op3->_result->is_valid())       do_output(op3->_result);
 801 
 802       break;
 803     }
 804 
 805 
 806 // LIR_OpJavaCall
 807     case lir_static_call:
 808     case lir_optvirtual_call:
 809     case lir_icvirtual_call:
 810     case lir_virtual_call:
 811     case lir_dynamic_call: {
 812       LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
 813       assert(opJavaCall != NULL, "must be");
 814 
 815       if (opJavaCall->_receiver->is_valid())     do_input(opJavaCall->_receiver);
 816 
 817       // only visit register parameters
 818       int n = opJavaCall->_arguments->length();
 819       for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
 820         if (!opJavaCall->_arguments->at(i)->is_pointer()) {
 821           do_input(*opJavaCall->_arguments->adr_at(i));
 822         }
 823       }
 824 
 825       if (opJavaCall->_info)                     do_info(opJavaCall->_info);
 826       if (opJavaCall->is_method_handle_invoke()) {
 827         opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
 828         do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
 829       }
 830       do_call();
 831       if (opJavaCall->_result->is_valid())       do_output(opJavaCall->_result);
 832 
 833       break;
 834     }
 835 
 836 
 837 // LIR_OpRTCall
 838     case lir_rtcall: {
 839       assert(op->as_OpRTCall() != NULL, "must be");
 840       LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
 841 
 842       // only visit register parameters
 843       int n = opRTCall->_arguments->length();
 844       for (int i = 0; i < n; i++) {
 845         if (!opRTCall->_arguments->at(i)->is_pointer()) {
 846           do_input(*opRTCall->_arguments->adr_at(i));
 847         }
 848       }
 849       if (opRTCall->_info)                     do_info(opRTCall->_info);
 850       if (opRTCall->_tmp->is_valid())          do_temp(opRTCall->_tmp);
 851       do_call();
 852       if (opRTCall->_result->is_valid())       do_output(opRTCall->_result);
 853 
 854       break;
 855     }
 856 
 857 
 858 // LIR_OpArrayCopy
 859     case lir_arraycopy: {
 860       assert(op->as_OpArrayCopy() != NULL, "must be");
 861       LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
 862 
 863       assert(opArrayCopy->_result->is_illegal(), "unused");
 864       assert(opArrayCopy->_src->is_valid(), "used");          do_input(opArrayCopy->_src);     do_temp(opArrayCopy->_src);
 865       assert(opArrayCopy->_src_pos->is_valid(), "used");      do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
 866       assert(opArrayCopy->_dst->is_valid(), "used");          do_input(opArrayCopy->_dst);     do_temp(opArrayCopy->_dst);
 867       assert(opArrayCopy->_dst_pos->is_valid(), "used");      do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
 868       assert(opArrayCopy->_length->is_valid(), "used");       do_input(opArrayCopy->_length);  do_temp(opArrayCopy->_length);
 869       assert(opArrayCopy->_tmp->is_valid(), "used");          do_temp(opArrayCopy->_tmp);
 870       if (opArrayCopy->_info)                     do_info(opArrayCopy->_info);
 871 
 872       // the implementation of arraycopy always has a call into the runtime
 873       do_call();
 874 
 875       break;
 876     }
 877 
 878 
 879 // LIR_OpUpdateCRC32
 880     case lir_updatecrc32: {
 881       assert(op->as_OpUpdateCRC32() != NULL, "must be");
 882       LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
 883 
 884       assert(opUp->_crc->is_valid(), "used");          do_input(opUp->_crc);     do_temp(opUp->_crc);
 885       assert(opUp->_val->is_valid(), "used");          do_input(opUp->_val);     do_temp(opUp->_val);
 886       assert(opUp->_result->is_valid(), "used");       do_output(opUp->_result);
 887       assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32");
 888 
 889       break;
 890     }
 891 
 892 
 893 // LIR_OpLock
 894     case lir_lock:
 895     case lir_unlock: {
 896       assert(op->as_OpLock() != NULL, "must be");
 897       LIR_OpLock* opLock = (LIR_OpLock*)op;
 898 
 899       if (opLock->_info)                          do_info(opLock->_info);
 900 
 901       // TODO: check if these operands really have to be temp
 902       // (or if input is sufficient). This may have influence on the oop map!
 903       assert(opLock->_lock->is_valid(), "used");  do_temp(opLock->_lock);
 904       assert(opLock->_hdr->is_valid(),  "used");  do_temp(opLock->_hdr);
 905       assert(opLock->_obj->is_valid(),  "used");  do_temp(opLock->_obj);
 906 
 907       if (opLock->_scratch->is_valid())           do_temp(opLock->_scratch);
 908       assert(opLock->_result->is_illegal(), "unused");
 909 
 910       do_stub(opLock->_stub);
 911 
 912       break;
 913     }
 914 
 915 
 916 // LIR_OpDelay
 917     case lir_delay_slot: {
 918       assert(op->as_OpDelay() != NULL, "must be");
 919       LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
 920 
 921       visit(opDelay->delay_op());
 922       break;
 923     }
 924 
 925 // LIR_OpTypeCheck
 926     case lir_instanceof:
 927     case lir_checkcast:
 928     case lir_store_check: {
 929       assert(op->as_OpTypeCheck() != NULL, "must be");
 930       LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
 931 
 932       if (opTypeCheck->_info_for_exception)       do_info(opTypeCheck->_info_for_exception);
 933       if (opTypeCheck->_info_for_patch)           do_info(opTypeCheck->_info_for_patch);
 934       if (opTypeCheck->_object->is_valid())       do_input(opTypeCheck->_object);
 935       if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
 936         do_temp(opTypeCheck->_object);
 937       }
 938       if (opTypeCheck->_array->is_valid())        do_input(opTypeCheck->_array);
 939       if (opTypeCheck->_tmp1->is_valid())         do_temp(opTypeCheck->_tmp1);
 940       if (opTypeCheck->_tmp2->is_valid())         do_temp(opTypeCheck->_tmp2);
 941       if (opTypeCheck->_tmp3->is_valid())         do_temp(opTypeCheck->_tmp3);
 942       if (opTypeCheck->_result->is_valid())       do_output(opTypeCheck->_result);
 943                                                   do_stub(opTypeCheck->_stub);
 944       break;
 945     }
 946 
 947 // LIR_OpCompareAndSwap
 948     case lir_cas_long:
 949     case lir_cas_obj:
 950     case lir_cas_int: {
 951       assert(op->as_OpCompareAndSwap() != NULL, "must be");
 952       LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
 953 
 954       assert(opCompareAndSwap->_addr->is_valid(),      "used");
 955       assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
 956       assert(opCompareAndSwap->_new_value->is_valid(), "used");
 957       if (opCompareAndSwap->_info)                    do_info(opCompareAndSwap->_info);
 958                                                       do_input(opCompareAndSwap->_addr);
 959                                                       do_temp(opCompareAndSwap->_addr);
 960                                                       do_input(opCompareAndSwap->_cmp_value);
 961                                                       do_temp(opCompareAndSwap->_cmp_value);
 962                                                       do_input(opCompareAndSwap->_new_value);
 963                                                       do_temp(opCompareAndSwap->_new_value);
 964       if (opCompareAndSwap->_tmp1->is_valid())        do_temp(opCompareAndSwap->_tmp1);
 965       if (opCompareAndSwap->_tmp2->is_valid())        do_temp(opCompareAndSwap->_tmp2);
 966       if (opCompareAndSwap->_result->is_valid())      do_output(opCompareAndSwap->_result);
 967 
 968       break;
 969     }
 970 
 971 
 972 // LIR_OpAllocArray;
 973     case lir_alloc_array: {
 974       assert(op->as_OpAllocArray() != NULL, "must be");
 975       LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
 976 
 977       if (opAllocArray->_info)                        do_info(opAllocArray->_info);
 978       if (opAllocArray->_klass->is_valid())           do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
 979       if (opAllocArray->_len->is_valid())             do_input(opAllocArray->_len);   do_temp(opAllocArray->_len);
 980       if (opAllocArray->_tmp1->is_valid())            do_temp(opAllocArray->_tmp1);
 981       if (opAllocArray->_tmp2->is_valid())            do_temp(opAllocArray->_tmp2);
 982       if (opAllocArray->_tmp3->is_valid())            do_temp(opAllocArray->_tmp3);
 983       if (opAllocArray->_tmp4->is_valid())            do_temp(opAllocArray->_tmp4);
 984       if (opAllocArray->_result->is_valid())          do_output(opAllocArray->_result);
 985                                                       do_stub(opAllocArray->_stub);
 986       break;
 987     }
 988 
 989 // LIR_OpProfileCall:
 990     case lir_profile_call: {
 991       assert(op->as_OpProfileCall() != NULL, "must be");
 992       LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
 993 
 994       if (opProfileCall->_recv->is_valid())              do_temp(opProfileCall->_recv);
 995       assert(opProfileCall->_mdo->is_valid(), "used");   do_temp(opProfileCall->_mdo);
 996       assert(opProfileCall->_tmp1->is_valid(), "used");  do_temp(opProfileCall->_tmp1);
 997       break;
 998     }
 999 
1000 // LIR_OpProfileType:
1001     case lir_profile_type: {
1002       assert(op->as_OpProfileType() != NULL, "must be");
1003       LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
1004 
1005       do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
1006       do_input(opProfileType->_obj);
1007       do_temp(opProfileType->_tmp);
1008       break;
1009     }
1010   default:
1011     ShouldNotReachHere();
1012   }
1013 }
1014 
1015 
1016 void LIR_OpVisitState::do_stub(CodeStub* stub) {
1017   if (stub != NULL) {
1018     stub->visit(this);
1019   }
1020 }
1021 
1022 XHandlers* LIR_OpVisitState::all_xhandler() {
1023   XHandlers* result = NULL;
1024 
1025   int i;
1026   for (i = 0; i < info_count(); i++) {
1027     if (info_at(i)->exception_handlers() != NULL) {
1028       result = info_at(i)->exception_handlers();
1029       break;
1030     }
1031   }
1032 
1033 #ifdef ASSERT
1034   for (i = 0; i < info_count(); i++) {
1035     assert(info_at(i)->exception_handlers() == NULL ||
1036            info_at(i)->exception_handlers() == result,
1037            "only one xhandler list allowed per LIR-operation");
1038   }
1039 #endif
1040 
1041   if (result != NULL) {
1042     return result;
1043   } else {
1044     return new XHandlers();
1045   }
1046 
1047   return result;
1048 }
1049 
1050 
1051 #ifdef ASSERT
1052 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
1053   visit(op);
1054 
1055   return opr_count(inputMode) == 0 &&
1056          opr_count(outputMode) == 0 &&
1057          opr_count(tempMode) == 0 &&
1058          info_count() == 0 &&
1059          !has_call() &&
1060          !has_slow_case();
1061 }
1062 #endif
1063 
1064 //---------------------------------------------------
1065 
1066 
1067 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
1068   masm->emit_call(this);
1069 }
1070 
1071 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
1072   masm->emit_rtcall(this);
1073 }
1074 
1075 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
1076   masm->emit_opLabel(this);
1077 }
1078 
1079 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
1080   masm->emit_arraycopy(this);
1081   masm->append_code_stub(stub());
1082 }
1083 
1084 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
1085   masm->emit_updatecrc32(this);
1086 }
1087 
1088 void LIR_Op0::emit_code(LIR_Assembler* masm) {
1089   masm->emit_op0(this);
1090 }
1091 
1092 void LIR_Op1::emit_code(LIR_Assembler* masm) {
1093   masm->emit_op1(this);
1094 }
1095 
1096 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
1097   masm->emit_alloc_obj(this);
1098   masm->append_code_stub(stub());
1099 }
1100 
1101 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
1102   masm->emit_opBranch(this);
1103   if (stub()) {
1104     masm->append_code_stub(stub());
1105   }
1106 }
1107 
1108 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
1109   masm->emit_opConvert(this);
1110   if (stub() != NULL) {
1111     masm->append_code_stub(stub());
1112   }
1113 }
1114 
1115 void LIR_Op2::emit_code(LIR_Assembler* masm) {
1116   masm->emit_op2(this);
1117 }
1118 
1119 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1120   masm->emit_alloc_array(this);
1121   masm->append_code_stub(stub());
1122 }
1123 
1124 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1125   masm->emit_opTypeCheck(this);
1126   if (stub()) {
1127     masm->append_code_stub(stub());
1128   }
1129 }
1130 
1131 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1132   masm->emit_compare_and_swap(this);
1133 }
1134 
1135 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1136   masm->emit_op3(this);
1137 }
1138 
1139 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1140   masm->emit_lock(this);
1141   if (stub()) {
1142     masm->append_code_stub(stub());
1143   }
1144 }
1145 
1146 #ifdef ASSERT
1147 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1148   masm->emit_assert(this);
1149 }
1150 #endif
1151 
1152 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1153   masm->emit_delay(this);
1154 }
1155 
1156 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1157   masm->emit_profile_call(this);
1158 }
1159 
1160 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1161   masm->emit_profile_type(this);
1162 }
1163 
1164 // LIR_List
1165 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1166   : _operations(8)
1167   , _compilation(compilation)
1168 #ifndef PRODUCT
1169   , _block(block)
1170 #endif
1171 #ifdef ASSERT
1172   , _file(NULL)
1173   , _line(0)
1174 #endif
1175 { }
1176 
1177 
1178 #ifdef ASSERT
1179 void LIR_List::set_file_and_line(const char * file, int line) {
1180   const char * f = strrchr(file, '/');
1181   if (f == NULL) f = strrchr(file, '\\');
1182   if (f == NULL) {
1183     f = file;
1184   } else {
1185     f++;
1186   }
1187   _file = f;
1188   _line = line;
1189 }
1190 #endif
1191 
1192 
1193 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1194   assert(this == buffer->lir_list(), "wrong lir list");
1195   const int n = _operations.length();
1196 
1197   if (buffer->number_of_ops() > 0) {
1198     // increase size of instructions list
1199     _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1200     // insert ops from buffer into instructions list
1201     int op_index = buffer->number_of_ops() - 1;
1202     int ip_index = buffer->number_of_insertion_points() - 1;
1203     int from_index = n - 1;
1204     int to_index = _operations.length() - 1;
1205     for (; ip_index >= 0; ip_index --) {
1206       int index = buffer->index_at(ip_index);
1207       // make room after insertion point
1208       while (index < from_index) {
1209         _operations.at_put(to_index --, _operations.at(from_index --));
1210       }
1211       // insert ops from buffer
1212       for (int i = buffer->count_at(ip_index); i > 0; i --) {
1213         _operations.at_put(to_index --, buffer->op_at(op_index --));
1214       }
1215     }
1216   }
1217 
1218   buffer->finish();
1219 }
1220 
1221 
1222 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1223   assert(reg->type() == T_OBJECT, "bad reg");
1224   append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o),  reg, T_OBJECT, lir_patch_normal, info));
1225 }
1226 
1227 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1228   assert(reg->type() == T_METADATA, "bad reg");
1229   append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1230 }
1231 
1232 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1233   append(new LIR_Op1(
1234             lir_move,
1235             LIR_OprFact::address(addr),
1236             src,
1237             addr->type(),
1238             patch_code,
1239             info));
1240 }
1241 
1242 
1243 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1244   append(new LIR_Op1(
1245             lir_move,
1246             LIR_OprFact::address(address),
1247             dst,
1248             address->type(),
1249             patch_code,
1250             info, lir_move_volatile));
1251 }
1252 
1253 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1254   append(new LIR_Op1(
1255             lir_move,
1256             LIR_OprFact::address(new LIR_Address(base, offset, type)),
1257             dst,
1258             type,
1259             patch_code,
1260             info, lir_move_volatile));
1261 }
1262 
1263 
1264 void LIR_List::prefetch(LIR_Address* addr, bool is_store) {
1265   append(new LIR_Op1(
1266             is_store ? lir_prefetchw : lir_prefetchr,
1267             LIR_OprFact::address(addr)));
1268 }
1269 
1270 
1271 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1272   append(new LIR_Op1(
1273             lir_move,
1274             LIR_OprFact::intConst(v),
1275             LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1276             type,
1277             patch_code,
1278             info));
1279 }
1280 
1281 
1282 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1283   append(new LIR_Op1(
1284             lir_move,
1285             LIR_OprFact::oopConst(o),
1286             LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1287             type,
1288             patch_code,
1289             info));
1290 }
1291 
1292 
1293 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1294   append(new LIR_Op1(
1295             lir_move,
1296             src,
1297             LIR_OprFact::address(addr),
1298             addr->type(),
1299             patch_code,
1300             info));
1301 }
1302 
1303 
1304 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1305   append(new LIR_Op1(
1306             lir_move,
1307             src,
1308             LIR_OprFact::address(addr),
1309             addr->type(),
1310             patch_code,
1311             info,
1312             lir_move_volatile));
1313 }
1314 
1315 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1316   append(new LIR_Op1(
1317             lir_move,
1318             src,
1319             LIR_OprFact::address(new LIR_Address(base, offset, type)),
1320             type,
1321             patch_code,
1322             info, lir_move_volatile));
1323 }
1324 
1325 
1326 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1327   append(new LIR_Op3(
1328                     lir_idiv,
1329                     left,
1330                     right,
1331                     tmp,
1332                     res,
1333                     info));
1334 }
1335 
1336 
1337 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1338   append(new LIR_Op3(
1339                     lir_idiv,
1340                     left,
1341                     LIR_OprFact::intConst(right),
1342                     tmp,
1343                     res,
1344                     info));
1345 }
1346 
1347 
1348 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1349   append(new LIR_Op3(
1350                     lir_irem,
1351                     left,
1352                     right,
1353                     tmp,
1354                     res,
1355                     info));
1356 }
1357 
1358 
1359 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1360   append(new LIR_Op3(
1361                     lir_irem,
1362                     left,
1363                     LIR_OprFact::intConst(right),
1364                     tmp,
1365                     res,
1366                     info));
1367 }
1368 
1369 
1370 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1371   append(new LIR_Op2(
1372                     lir_cmp,
1373                     condition,
1374                     LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1375                     LIR_OprFact::intConst(c),
1376                     info));
1377 }
1378 
1379 
1380 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1381   append(new LIR_Op2(
1382                     lir_cmp,
1383                     condition,
1384                     reg,
1385                     LIR_OprFact::address(addr),
1386                     info));
1387 }
1388 
1389 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1390                                int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1391   append(new LIR_OpAllocObj(
1392                            klass,
1393                            dst,
1394                            t1,
1395                            t2,
1396                            t3,
1397                            t4,
1398                            header_size,
1399                            object_size,
1400                            init_check,
1401                            stub));
1402 }
1403 
1404 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1405   append(new LIR_OpAllocArray(
1406                            klass,
1407                            len,
1408                            dst,
1409                            t1,
1410                            t2,
1411                            t3,
1412                            t4,
1413                            type,
1414                            stub));
1415 }
1416 
1417 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1418  append(new LIR_Op2(
1419                     lir_shl,
1420                     value,
1421                     count,
1422                     dst,
1423                     tmp));
1424 }
1425 
1426 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1427  append(new LIR_Op2(
1428                     lir_shr,
1429                     value,
1430                     count,
1431                     dst,
1432                     tmp));
1433 }
1434 
1435 
1436 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1437  append(new LIR_Op2(
1438                     lir_ushr,
1439                     value,
1440                     count,
1441                     dst,
1442                     tmp));
1443 }
1444 
1445 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1446   append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1447                      left,
1448                      right,
1449                      dst));
1450 }
1451 
1452 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1453   append(new LIR_OpLock(
1454                     lir_lock,
1455                     hdr,
1456                     obj,
1457                     lock,
1458                     scratch,
1459                     stub,
1460                     info));
1461 }
1462 
1463 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1464   append(new LIR_OpLock(
1465                     lir_unlock,
1466                     hdr,
1467                     obj,
1468                     lock,
1469                     scratch,
1470                     stub,
1471                     NULL));
1472 }
1473 
1474 
1475 void check_LIR() {
1476   // cannot do the proper checking as PRODUCT and other modes return different results
1477   // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
1478 }
1479 
1480 
1481 
1482 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1483                           LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1484                           CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1485                           ciMethod* profiled_method, int profiled_bci) {
1486   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1487                                            tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1488   if (profiled_method != NULL) {
1489     c->set_profiled_method(profiled_method);
1490     c->set_profiled_bci(profiled_bci);
1491     c->set_should_profile(true);
1492   }
1493   append(c);
1494 }
1495 
1496 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1497   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
1498   if (profiled_method != NULL) {
1499     c->set_profiled_method(profiled_method);
1500     c->set_profiled_bci(profiled_bci);
1501     c->set_should_profile(true);
1502   }
1503   append(c);
1504 }
1505 
1506 
1507 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1508                            CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1509   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1510   if (profiled_method != NULL) {
1511     c->set_profiled_method(profiled_method);
1512     c->set_profiled_bci(profiled_bci);
1513     c->set_should_profile(true);
1514   }
1515   append(c);
1516 }
1517 
1518 
1519 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1520                         LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1521   append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1522 }
1523 
1524 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1525                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1526   append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1527 }
1528 
1529 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1530                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1531   append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1532 }
1533 
1534 
1535 #ifdef PRODUCT
1536 
1537 void print_LIR(BlockList* blocks) {
1538 }
1539 
1540 #else
1541 // LIR_OprDesc
1542 void LIR_OprDesc::print() const {
1543   print(tty);
1544 }
1545 
1546 void LIR_OprDesc::print(outputStream* out) const {
1547   if (is_illegal()) {
1548     return;
1549   }
1550 
1551   out->print("[");
1552   if (is_pointer()) {
1553     pointer()->print_value_on(out);
1554   } else if (is_single_stack()) {
1555     out->print("stack:%d", single_stack_ix());
1556   } else if (is_double_stack()) {
1557     out->print("dbl_stack:%d",double_stack_ix());
1558   } else if (is_virtual()) {
1559     out->print("R%d", vreg_number());
1560   } else if (is_single_cpu()) {
1561     out->print("%s", as_register()->name());
1562   } else if (is_double_cpu()) {
1563     out->print("%s", as_register_hi()->name());
1564     out->print("%s", as_register_lo()->name());
1565 #if defined(X86)
1566   } else if (is_single_xmm()) {
1567     out->print("%s", as_xmm_float_reg()->name());
1568   } else if (is_double_xmm()) {
1569     out->print("%s", as_xmm_double_reg()->name());
1570   } else if (is_single_fpu()) {
1571     out->print("fpu%d", fpu_regnr());
1572   } else if (is_double_fpu()) {
1573     out->print("fpu%d", fpu_regnrLo());
1574 #elif defined(ARM)
1575   } else if (is_single_fpu()) {
1576     out->print("s%d", fpu_regnr());
1577   } else if (is_double_fpu()) {
1578     out->print("d%d", fpu_regnrLo() >> 1);
1579 #else
1580   } else if (is_single_fpu()) {
1581     out->print("%s", as_float_reg()->name());
1582   } else if (is_double_fpu()) {
1583     out->print("%s", as_double_reg()->name());
1584 #endif
1585 
1586   } else if (is_illegal()) {
1587     out->print("-");
1588   } else {
1589     out->print("Unknown Operand");
1590   }
1591   if (!is_illegal()) {
1592     out->print("|%c", type_char());
1593   }
1594   if (is_register() && is_last_use()) {
1595     out->print("(last_use)");
1596   }
1597   out->print("]");
1598 }
1599 
1600 
1601 // LIR_Address
1602 void LIR_Const::print_value_on(outputStream* out) const {
1603   switch (type()) {
1604     case T_ADDRESS:out->print("address:%d",as_jint());          break;
1605     case T_INT:    out->print("int:%d",   as_jint());           break;
1606     case T_LONG:   out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1607     case T_FLOAT:  out->print("flt:%f",   as_jfloat());         break;
1608     case T_DOUBLE: out->print("dbl:%f",   as_jdouble());        break;
1609     case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject()));        break;
1610     case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
1611     default:       out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1612   }
1613 }
1614 
1615 // LIR_Address
1616 void LIR_Address::print_value_on(outputStream* out) const {
1617   out->print("Base:"); _base->print(out);
1618   if (!_index->is_illegal()) {
1619     out->print(" Index:"); _index->print(out);
1620     switch (scale()) {
1621     case times_1: break;
1622     case times_2: out->print(" * 2"); break;
1623     case times_4: out->print(" * 4"); break;
1624     case times_8: out->print(" * 8"); break;
1625     }
1626   }
1627   out->print(" Disp: " INTX_FORMAT, _disp);
1628 }
1629 
1630 // debug output of block header without InstructionPrinter
1631 //       (because phi functions are not necessary for LIR)
1632 static void print_block(BlockBegin* x) {
1633   // print block id
1634   BlockEnd* end = x->end();
1635   tty->print("B%d ", x->block_id());
1636 
1637   // print flags
1638   if (x->is_set(BlockBegin::std_entry_flag))               tty->print("std ");
1639   if (x->is_set(BlockBegin::osr_entry_flag))               tty->print("osr ");
1640   if (x->is_set(BlockBegin::exception_entry_flag))         tty->print("ex ");
1641   if (x->is_set(BlockBegin::subroutine_entry_flag))        tty->print("jsr ");
1642   if (x->is_set(BlockBegin::backward_branch_target_flag))  tty->print("bb ");
1643   if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1644   if (x->is_set(BlockBegin::linear_scan_loop_end_flag))    tty->print("le ");
1645 
1646   // print block bci range
1647   tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
1648 
1649   // print predecessors and successors
1650   if (x->number_of_preds() > 0) {
1651     tty->print("preds: ");
1652     for (int i = 0; i < x->number_of_preds(); i ++) {
1653       tty->print("B%d ", x->pred_at(i)->block_id());
1654     }
1655   }
1656 
1657   if (x->number_of_sux() > 0) {
1658     tty->print("sux: ");
1659     for (int i = 0; i < x->number_of_sux(); i ++) {
1660       tty->print("B%d ", x->sux_at(i)->block_id());
1661     }
1662   }
1663 
1664   // print exception handlers
1665   if (x->number_of_exception_handlers() > 0) {
1666     tty->print("xhandler: ");
1667     for (int i = 0; i < x->number_of_exception_handlers();  i++) {
1668       tty->print("B%d ", x->exception_handler_at(i)->block_id());
1669     }
1670   }
1671 
1672   tty->cr();
1673 }
1674 
1675 void print_LIR(BlockList* blocks) {
1676   tty->print_cr("LIR:");
1677   int i;
1678   for (i = 0; i < blocks->length(); i++) {
1679     BlockBegin* bb = blocks->at(i);
1680     print_block(bb);
1681     tty->print("__id_Instruction___________________________________________"); tty->cr();
1682     bb->lir()->print_instructions();
1683   }
1684 }
1685 
1686 void LIR_List::print_instructions() {
1687   for (int i = 0; i < _operations.length(); i++) {
1688     _operations.at(i)->print(); tty->cr();
1689   }
1690   tty->cr();
1691 }
1692 
1693 // LIR_Ops printing routines
1694 // LIR_Op
1695 void LIR_Op::print_on(outputStream* out) const {
1696   if (id() != -1 || PrintCFGToFile) {
1697     out->print("%4d ", id());
1698   } else {
1699     out->print("     ");
1700   }
1701   out->print("%s ", name());
1702   print_instr(out);
1703   if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
1704 #ifdef ASSERT
1705   if (Verbose && _file != NULL) {
1706     out->print(" (%s:%d)", _file, _line);
1707   }
1708 #endif
1709 }
1710 
1711 const char * LIR_Op::name() const {
1712   const char* s = NULL;
1713   switch(code()) {
1714      // LIR_Op0
1715      case lir_membar:                s = "membar";        break;
1716      case lir_membar_acquire:        s = "membar_acquire"; break;
1717      case lir_membar_release:        s = "membar_release"; break;
1718      case lir_membar_loadload:       s = "membar_loadload";   break;
1719      case lir_membar_storestore:     s = "membar_storestore"; break;
1720      case lir_membar_loadstore:      s = "membar_loadstore";  break;
1721      case lir_membar_storeload:      s = "membar_storeload";  break;
1722      case lir_word_align:            s = "word_align";    break;
1723      case lir_label:                 s = "label";         break;
1724      case lir_nop:                   s = "nop";           break;
1725      case lir_backwardbranch_target: s = "backbranch";    break;
1726      case lir_std_entry:             s = "std_entry";     break;
1727      case lir_osr_entry:             s = "osr_entry";     break;
1728      case lir_build_frame:           s = "build_frm";     break;
1729      case lir_fpop_raw:              s = "fpop_raw";      break;
1730      case lir_24bit_FPU:             s = "24bit_FPU";     break;
1731      case lir_reset_FPU:             s = "reset_FPU";     break;
1732      case lir_breakpoint:            s = "breakpoint";    break;
1733      case lir_get_thread:            s = "get_thread";    break;
1734      // LIR_Op1
1735      case lir_fxch:                  s = "fxch";          break;
1736      case lir_fld:                   s = "fld";           break;
1737      case lir_ffree:                 s = "ffree";         break;
1738      case lir_push:                  s = "push";          break;
1739      case lir_pop:                   s = "pop";           break;
1740      case lir_null_check:            s = "null_check";    break;
1741      case lir_return:                s = "return";        break;
1742      case lir_safepoint:             s = "safepoint";     break;
1743      case lir_neg:                   s = "neg";           break;
1744      case lir_leal:                  s = "leal";          break;
1745      case lir_branch:                s = "branch";        break;
1746      case lir_cond_float_branch:     s = "flt_cond_br";   break;
1747      case lir_move:                  s = "move";          break;
1748      case lir_roundfp:               s = "roundfp";       break;
1749      case lir_rtcall:                s = "rtcall";        break;
1750      case lir_throw:                 s = "throw";         break;
1751      case lir_unwind:                s = "unwind";        break;
1752      case lir_convert:               s = "convert";       break;
1753      case lir_alloc_object:          s = "alloc_obj";     break;
1754      case lir_monaddr:               s = "mon_addr";      break;
1755      case lir_pack64:                s = "pack64";        break;
1756      case lir_unpack64:              s = "unpack64";      break;
1757      // LIR_Op2
1758      case lir_cmp:                   s = "cmp";           break;
1759      case lir_cmp_l2i:               s = "cmp_l2i";       break;
1760      case lir_ucmp_fd2i:             s = "ucomp_fd2i";    break;
1761      case lir_cmp_fd2i:              s = "comp_fd2i";     break;
1762      case lir_cmove:                 s = "cmove";         break;
1763      case lir_add:                   s = "add";           break;
1764      case lir_sub:                   s = "sub";           break;
1765      case lir_mul:                   s = "mul";           break;
1766      case lir_mul_strictfp:          s = "mul_strictfp";  break;
1767      case lir_div:                   s = "div";           break;
1768      case lir_div_strictfp:          s = "div_strictfp";  break;
1769      case lir_rem:                   s = "rem";           break;
1770      case lir_abs:                   s = "abs";           break;
1771      case lir_sqrt:                  s = "sqrt";          break;
1772      case lir_sin:                   s = "sin";           break;
1773      case lir_cos:                   s = "cos";           break;
1774      case lir_tan:                   s = "tan";           break;
1775      case lir_log:                   s = "log";           break;
1776      case lir_log10:                 s = "log10";         break;
1777      case lir_exp:                   s = "exp";           break;
1778      case lir_pow:                   s = "pow";           break;
1779      case lir_logic_and:             s = "logic_and";     break;
1780      case lir_logic_or:              s = "logic_or";      break;
1781      case lir_logic_xor:             s = "logic_xor";     break;
1782      case lir_shl:                   s = "shift_left";    break;
1783      case lir_shr:                   s = "shift_right";   break;
1784      case lir_ushr:                  s = "ushift_right";  break;
1785      case lir_alloc_array:           s = "alloc_array";   break;
1786      case lir_xadd:                  s = "xadd";          break;
1787      case lir_xchg:                  s = "xchg";          break;
1788      // LIR_Op3
1789      case lir_idiv:                  s = "idiv";          break;
1790      case lir_irem:                  s = "irem";          break;
1791      // LIR_OpJavaCall
1792      case lir_static_call:           s = "static";        break;
1793      case lir_optvirtual_call:       s = "optvirtual";    break;
1794      case lir_icvirtual_call:        s = "icvirtual";     break;
1795      case lir_virtual_call:          s = "virtual";       break;
1796      case lir_dynamic_call:          s = "dynamic";       break;
1797      // LIR_OpArrayCopy
1798      case lir_arraycopy:             s = "arraycopy";     break;
1799      // LIR_OpUpdateCRC32
1800      case lir_updatecrc32:           s = "updatecrc32";   break;
1801      // LIR_OpLock
1802      case lir_lock:                  s = "lock";          break;
1803      case lir_unlock:                s = "unlock";        break;
1804      // LIR_OpDelay
1805      case lir_delay_slot:            s = "delay";         break;
1806      // LIR_OpTypeCheck
1807      case lir_instanceof:            s = "instanceof";    break;
1808      case lir_checkcast:             s = "checkcast";     break;
1809      case lir_store_check:           s = "store_check";   break;
1810      // LIR_OpCompareAndSwap
1811      case lir_cas_long:              s = "cas_long";      break;
1812      case lir_cas_obj:               s = "cas_obj";      break;
1813      case lir_cas_int:               s = "cas_int";      break;
1814      // LIR_OpProfileCall
1815      case lir_profile_call:          s = "profile_call";  break;
1816      // LIR_OpProfileType
1817      case lir_profile_type:          s = "profile_type";  break;
1818      // LIR_OpAssert
1819 #ifdef ASSERT
1820      case lir_assert:                s = "assert";        break;
1821 #endif
1822      case lir_none:                  ShouldNotReachHere();break;
1823     default:                         s = "illegal_op";    break;
1824   }
1825   return s;
1826 }
1827 
1828 // LIR_OpJavaCall
1829 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1830   out->print("call: ");
1831   out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1832   if (receiver()->is_valid()) {
1833     out->print(" [recv: ");   receiver()->print(out);   out->print("]");
1834   }
1835   if (result_opr()->is_valid()) {
1836     out->print(" [result: "); result_opr()->print(out); out->print("]");
1837   }
1838 }
1839 
1840 // LIR_OpLabel
1841 void LIR_OpLabel::print_instr(outputStream* out) const {
1842   out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1843 }
1844 
1845 // LIR_OpArrayCopy
1846 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1847   src()->print(out);     out->print(" ");
1848   src_pos()->print(out); out->print(" ");
1849   dst()->print(out);     out->print(" ");
1850   dst_pos()->print(out); out->print(" ");
1851   length()->print(out);  out->print(" ");
1852   tmp()->print(out);     out->print(" ");
1853 }
1854 
1855 // LIR_OpUpdateCRC32
1856 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1857   crc()->print(out);     out->print(" ");
1858   val()->print(out);     out->print(" ");
1859   result_opr()->print(out); out->print(" ");
1860 }
1861 
1862 // LIR_OpCompareAndSwap
1863 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1864   addr()->print(out);      out->print(" ");
1865   cmp_value()->print(out); out->print(" ");
1866   new_value()->print(out); out->print(" ");
1867   tmp1()->print(out);      out->print(" ");
1868   tmp2()->print(out);      out->print(" ");
1869 
1870 }
1871 
1872 // LIR_Op0
1873 void LIR_Op0::print_instr(outputStream* out) const {
1874   result_opr()->print(out);
1875 }
1876 
1877 // LIR_Op1
1878 const char * LIR_Op1::name() const {
1879   if (code() == lir_move) {
1880     switch (move_kind()) {
1881     case lir_move_normal:
1882       return "move";
1883     case lir_move_unaligned:
1884       return "unaligned move";
1885     case lir_move_volatile:
1886       return "volatile_move";
1887     case lir_move_wide:
1888       return "wide_move";
1889     default:
1890       ShouldNotReachHere();
1891     return "illegal_op";
1892     }
1893   } else {
1894     return LIR_Op::name();
1895   }
1896 }
1897 
1898 
1899 void LIR_Op1::print_instr(outputStream* out) const {
1900   _opr->print(out);         out->print(" ");
1901   result_opr()->print(out); out->print(" ");
1902   print_patch_code(out, patch_code());
1903 }
1904 
1905 
1906 // LIR_Op1
1907 void LIR_OpRTCall::print_instr(outputStream* out) const {
1908   intx a = (intx)addr();
1909   out->print("%s", Runtime1::name_for_address(addr()));
1910   out->print(" ");
1911   tmp()->print(out);
1912 }
1913 
1914 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1915   switch(code) {
1916     case lir_patch_none:                                 break;
1917     case lir_patch_low:    out->print("[patch_low]");    break;
1918     case lir_patch_high:   out->print("[patch_high]");   break;
1919     case lir_patch_normal: out->print("[patch_normal]"); break;
1920     default: ShouldNotReachHere();
1921   }
1922 }
1923 
1924 // LIR_OpBranch
1925 void LIR_OpBranch::print_instr(outputStream* out) const {
1926   print_condition(out, cond());             out->print(" ");
1927   if (block() != NULL) {
1928     out->print("[B%d] ", block()->block_id());
1929   } else if (stub() != NULL) {
1930     out->print("[");
1931     stub()->print_name(out);
1932     out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1933     if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1934   } else {
1935     out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1936   }
1937   if (ublock() != NULL) {
1938     out->print("unordered: [B%d] ", ublock()->block_id());
1939   }
1940 }
1941 
1942 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1943   switch(cond) {
1944     case lir_cond_equal:           out->print("[EQ]");      break;
1945     case lir_cond_notEqual:        out->print("[NE]");      break;
1946     case lir_cond_less:            out->print("[LT]");      break;
1947     case lir_cond_lessEqual:       out->print("[LE]");      break;
1948     case lir_cond_greaterEqual:    out->print("[GE]");      break;
1949     case lir_cond_greater:         out->print("[GT]");      break;
1950     case lir_cond_belowEqual:      out->print("[BE]");      break;
1951     case lir_cond_aboveEqual:      out->print("[AE]");      break;
1952     case lir_cond_always:          out->print("[AL]");      break;
1953     default:                       out->print("[%d]",cond); break;
1954   }
1955 }
1956 
1957 // LIR_OpConvert
1958 void LIR_OpConvert::print_instr(outputStream* out) const {
1959   print_bytecode(out, bytecode());
1960   in_opr()->print(out);                  out->print(" ");
1961   result_opr()->print(out);              out->print(" ");
1962 #ifdef PPC
1963   if(tmp1()->is_valid()) {
1964     tmp1()->print(out); out->print(" ");
1965     tmp2()->print(out); out->print(" ");
1966   }
1967 #endif
1968 }
1969 
1970 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1971   switch(code) {
1972     case Bytecodes::_d2f: out->print("[d2f] "); break;
1973     case Bytecodes::_d2i: out->print("[d2i] "); break;
1974     case Bytecodes::_d2l: out->print("[d2l] "); break;
1975     case Bytecodes::_f2d: out->print("[f2d] "); break;
1976     case Bytecodes::_f2i: out->print("[f2i] "); break;
1977     case Bytecodes::_f2l: out->print("[f2l] "); break;
1978     case Bytecodes::_i2b: out->print("[i2b] "); break;
1979     case Bytecodes::_i2c: out->print("[i2c] "); break;
1980     case Bytecodes::_i2d: out->print("[i2d] "); break;
1981     case Bytecodes::_i2f: out->print("[i2f] "); break;
1982     case Bytecodes::_i2l: out->print("[i2l] "); break;
1983     case Bytecodes::_i2s: out->print("[i2s] "); break;
1984     case Bytecodes::_l2i: out->print("[l2i] "); break;
1985     case Bytecodes::_l2f: out->print("[l2f] "); break;
1986     case Bytecodes::_l2d: out->print("[l2d] "); break;
1987     default:
1988       out->print("[?%d]",code);
1989     break;
1990   }
1991 }
1992 
1993 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1994   klass()->print(out);                      out->print(" ");
1995   obj()->print(out);                        out->print(" ");
1996   tmp1()->print(out);                       out->print(" ");
1997   tmp2()->print(out);                       out->print(" ");
1998   tmp3()->print(out);                       out->print(" ");
1999   tmp4()->print(out);                       out->print(" ");
2000   out->print("[hdr:%d]", header_size()); out->print(" ");
2001   out->print("[obj:%d]", object_size()); out->print(" ");
2002   out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
2003 }
2004 
2005 void LIR_OpRoundFP::print_instr(outputStream* out) const {
2006   _opr->print(out);         out->print(" ");
2007   tmp()->print(out);        out->print(" ");
2008   result_opr()->print(out); out->print(" ");
2009 }
2010 
2011 // LIR_Op2
2012 void LIR_Op2::print_instr(outputStream* out) const {
2013   if (code() == lir_cmove) {
2014     print_condition(out, condition());         out->print(" ");
2015   }
2016   in_opr1()->print(out);    out->print(" ");
2017   in_opr2()->print(out);    out->print(" ");
2018   if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out);    out->print(" "); }
2019   if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out);    out->print(" "); }
2020   if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out);    out->print(" "); }
2021   if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out);    out->print(" "); }
2022   if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out);    out->print(" "); }
2023   result_opr()->print(out);
2024 }
2025 
2026 void LIR_OpAllocArray::print_instr(outputStream* out) const {
2027   klass()->print(out);                   out->print(" ");
2028   len()->print(out);                     out->print(" ");
2029   obj()->print(out);                     out->print(" ");
2030   tmp1()->print(out);                    out->print(" ");
2031   tmp2()->print(out);                    out->print(" ");
2032   tmp3()->print(out);                    out->print(" ");
2033   tmp4()->print(out);                    out->print(" ");
2034   out->print("[type:0x%x]", type());     out->print(" ");
2035   out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
2036 }
2037 
2038 
2039 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
2040   object()->print(out);                  out->print(" ");
2041   if (code() == lir_store_check) {
2042     array()->print(out);                 out->print(" ");
2043   }
2044   if (code() != lir_store_check) {
2045     klass()->print_name_on(out);         out->print(" ");
2046     if (fast_check())                 out->print("fast_check ");
2047   }
2048   tmp1()->print(out);                    out->print(" ");
2049   tmp2()->print(out);                    out->print(" ");
2050   tmp3()->print(out);                    out->print(" ");
2051   result_opr()->print(out);              out->print(" ");
2052   if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
2053 }
2054 
2055 
2056 // LIR_Op3
2057 void LIR_Op3::print_instr(outputStream* out) const {
2058   in_opr1()->print(out);    out->print(" ");
2059   in_opr2()->print(out);    out->print(" ");
2060   in_opr3()->print(out);    out->print(" ");
2061   result_opr()->print(out);
2062 }
2063 
2064 
2065 void LIR_OpLock::print_instr(outputStream* out) const {
2066   hdr_opr()->print(out);   out->print(" ");
2067   obj_opr()->print(out);   out->print(" ");
2068   lock_opr()->print(out);  out->print(" ");
2069   if (_scratch->is_valid()) {
2070     _scratch->print(out);  out->print(" ");
2071   }
2072   out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
2073 }
2074 
2075 #ifdef ASSERT
2076 void LIR_OpAssert::print_instr(outputStream* out) const {
2077   print_condition(out, condition()); out->print(" ");
2078   in_opr1()->print(out);             out->print(" ");
2079   in_opr2()->print(out);             out->print(", \"");
2080   out->print("%s", msg());          out->print("\"");
2081 }
2082 #endif
2083 
2084 
2085 void LIR_OpDelay::print_instr(outputStream* out) const {
2086   _op->print_on(out);
2087 }
2088 
2089 
2090 // LIR_OpProfileCall
2091 void LIR_OpProfileCall::print_instr(outputStream* out) const {
2092   profiled_method()->name()->print_symbol_on(out);
2093   out->print(".");
2094   profiled_method()->holder()->name()->print_symbol_on(out);
2095   out->print(" @ %d ", profiled_bci());
2096   mdo()->print(out);           out->print(" ");
2097   recv()->print(out);          out->print(" ");
2098   tmp1()->print(out);          out->print(" ");
2099 }
2100 
2101 // LIR_OpProfileType
2102 void LIR_OpProfileType::print_instr(outputStream* out) const {
2103   out->print("exact = "); exact_klass()->print_name_on(out);
2104   out->print("current = "); ciTypeEntries::print_ciklass(out, current_klass());
2105   mdp()->print(out);          out->print(" ");
2106   obj()->print(out);          out->print(" ");
2107   tmp()->print(out);          out->print(" ");
2108 }
2109 
2110 #endif // PRODUCT
2111 
2112 // Implementation of LIR_InsertionBuffer
2113 
2114 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
2115   assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
2116 
2117   int i = number_of_insertion_points() - 1;
2118   if (i < 0 || index_at(i) < index) {
2119     append_new(index, 1);
2120   } else {
2121     assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2122     assert(count_at(i) > 0, "check");
2123     set_count_at(i, count_at(i) + 1);
2124   }
2125   _ops.push(op);
2126 
2127   DEBUG_ONLY(verify());
2128 }
2129 
2130 #ifdef ASSERT
2131 void LIR_InsertionBuffer::verify() {
2132   int sum = 0;
2133   int prev_idx = -1;
2134 
2135   for (int i = 0; i < number_of_insertion_points(); i++) {
2136     assert(prev_idx < index_at(i), "index must be ordered ascending");
2137     sum += count_at(i);
2138   }
2139   assert(sum == number_of_ops(), "wrong total sum");
2140 }
2141 #endif