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src/cpu/x86/vm/vm_version_x86.cpp

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 660       UseCRC32Intrinsics = true;
 661     }
 662   } else if (UseCRC32Intrinsics) {
 663     if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics))
 664       warning("CRC32 Intrinsics requires CLMUL instructions (not available on this CPU)");
 665     FLAG_SET_DEFAULT(UseCRC32Intrinsics, false);
 666   }
 667 
 668   // The AES intrinsic stubs require AES instruction support (of course)
 669   // but also require sse3 mode for instructions it use.
 670   if (UseAES && (UseSSE > 2)) {
 671     if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
 672       UseAESIntrinsics = true;
 673     }
 674   } else if (UseAESIntrinsics) {
 675     if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
 676       warning("AES intrinsics are not available on this CPU");
 677     FLAG_SET_DEFAULT(UseAESIntrinsics, false);
 678   }
 679 











 680   if (UseSHA) {
 681     warning("SHA instructions are not available on this CPU");
 682     FLAG_SET_DEFAULT(UseSHA, false);
 683   }
 684   if (UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics) {
 685     warning("SHA intrinsics are not available on this CPU");
 686     FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
 687     FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
 688     FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
 689   }
 690 
 691   // Adjust RTM (Restricted Transactional Memory) flags
 692   if (!supports_rtm() && UseRTMLocking) {
 693     // Can't continue because UseRTMLocking affects UseBiasedLocking flag
 694     // setting during arguments processing. See use_biased_locking().
 695     // VM_Version_init() is executed after UseBiasedLocking is used
 696     // in Thread::allocate().
 697     vm_exit_during_initialization("RTM instructions are not available on this CPU");
 698   }
 699 




 660       UseCRC32Intrinsics = true;
 661     }
 662   } else if (UseCRC32Intrinsics) {
 663     if (!FLAG_IS_DEFAULT(UseCRC32Intrinsics))
 664       warning("CRC32 Intrinsics requires CLMUL instructions (not available on this CPU)");
 665     FLAG_SET_DEFAULT(UseCRC32Intrinsics, false);
 666   }
 667 
 668   // The AES intrinsic stubs require AES instruction support (of course)
 669   // but also require sse3 mode for instructions it use.
 670   if (UseAES && (UseSSE > 2)) {
 671     if (FLAG_IS_DEFAULT(UseAESIntrinsics)) {
 672       UseAESIntrinsics = true;
 673     }
 674   } else if (UseAESIntrinsics) {
 675     if (!FLAG_IS_DEFAULT(UseAESIntrinsics))
 676       warning("AES intrinsics are not available on this CPU");
 677     FLAG_SET_DEFAULT(UseAESIntrinsics, false);
 678   }
 679 
 680   // GHASH/GCM intrinsics
 681   if (UseCLMUL && (UseSSE > 2)) {
 682     if (FLAG_IS_DEFAULT(UseGHASHIntrinsics)) {
 683       UseGHASHIntrinsics = true;
 684     }
 685   } else if (UseGHASHIntrinsics) {
 686     if (!FLAG_IS_DEFAULT(UseGHASHIntrinsics))
 687       warning("GHASH intrinsic requires CLMUL and SSE2 instructions on this CPU");
 688     FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
 689   }
 690 
 691   if (UseSHA) {
 692     warning("SHA instructions are not available on this CPU");
 693     FLAG_SET_DEFAULT(UseSHA, false);
 694   }
 695   if (UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics) {
 696     warning("SHA intrinsics are not available on this CPU");
 697     FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
 698     FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
 699     FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
 700   }
 701 
 702   // Adjust RTM (Restricted Transactional Memory) flags
 703   if (!supports_rtm() && UseRTMLocking) {
 704     // Can't continue because UseRTMLocking affects UseBiasedLocking flag
 705     // setting during arguments processing. See use_biased_locking().
 706     // VM_Version_init() is executed after UseBiasedLocking is used
 707     // in Thread::allocate().
 708     vm_exit_during_initialization("RTM instructions are not available on this CPU");
 709   }
 710 


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