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src/cpu/x86/vm/assembler_x86.hpp

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1649   void prefetchr(Address src);
1650   void prefetcht0(Address src);
1651   void prefetcht1(Address src);
1652   void prefetcht2(Address src);
1653   void prefetchw(Address src);
1654 
1655   // Shuffle Bytes
1656   void pshufb(XMMRegister dst, XMMRegister src);
1657   void pshufb(XMMRegister dst, Address src);
1658 
1659   // Shuffle Packed Doublewords
1660   void pshufd(XMMRegister dst, XMMRegister src, int mode);
1661   void pshufd(XMMRegister dst, Address src,     int mode);
1662 
1663   // Shuffle Packed Low Words
1664   void pshuflw(XMMRegister dst, XMMRegister src, int mode);
1665   void pshuflw(XMMRegister dst, Address src,     int mode);
1666 
1667   // Shift Right by bytes Logical DoubleQuadword Immediate
1668   void psrldq(XMMRegister dst, int shift);


1669 
1670   // Logical Compare 128bit
1671   void ptest(XMMRegister dst, XMMRegister src);
1672   void ptest(XMMRegister dst, Address src);
1673   // Logical Compare 256bit
1674   void vptest(XMMRegister dst, XMMRegister src);
1675   void vptest(XMMRegister dst, Address src);
1676 
1677   // Interleave Low Bytes
1678   void punpcklbw(XMMRegister dst, XMMRegister src);
1679   void punpcklbw(XMMRegister dst, Address src);
1680 
1681   // Interleave Low Doublewords
1682   void punpckldq(XMMRegister dst, XMMRegister src);
1683   void punpckldq(XMMRegister dst, Address src);
1684 
1685   // Interleave Low Quadwords
1686   void punpcklqdq(XMMRegister dst, XMMRegister src);
1687 
1688 #ifndef _LP64 // no 32bit push/pop on amd64




1649   void prefetchr(Address src);
1650   void prefetcht0(Address src);
1651   void prefetcht1(Address src);
1652   void prefetcht2(Address src);
1653   void prefetchw(Address src);
1654 
1655   // Shuffle Bytes
1656   void pshufb(XMMRegister dst, XMMRegister src);
1657   void pshufb(XMMRegister dst, Address src);
1658 
1659   // Shuffle Packed Doublewords
1660   void pshufd(XMMRegister dst, XMMRegister src, int mode);
1661   void pshufd(XMMRegister dst, Address src,     int mode);
1662 
1663   // Shuffle Packed Low Words
1664   void pshuflw(XMMRegister dst, XMMRegister src, int mode);
1665   void pshuflw(XMMRegister dst, Address src,     int mode);
1666 
1667   // Shift Right by bytes Logical DoubleQuadword Immediate
1668   void psrldq(XMMRegister dst, int shift);
1669   // Shift Left by bytes Logical DoubleQuadword Immediate
1670   void pslldq(XMMRegister dst, int shift);
1671 
1672   // Logical Compare 128bit
1673   void ptest(XMMRegister dst, XMMRegister src);
1674   void ptest(XMMRegister dst, Address src);
1675   // Logical Compare 256bit
1676   void vptest(XMMRegister dst, XMMRegister src);
1677   void vptest(XMMRegister dst, Address src);
1678 
1679   // Interleave Low Bytes
1680   void punpcklbw(XMMRegister dst, XMMRegister src);
1681   void punpcklbw(XMMRegister dst, Address src);
1682 
1683   // Interleave Low Doublewords
1684   void punpckldq(XMMRegister dst, XMMRegister src);
1685   void punpckldq(XMMRegister dst, Address src);
1686 
1687   // Interleave Low Quadwords
1688   void punpcklqdq(XMMRegister dst, XMMRegister src);
1689 
1690 #ifndef _LP64 // no 32bit push/pop on amd64


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