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src/cpu/aarch64/vm/vm_version_aarch64.cpp

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   1 /*
   2  * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2015, Red Hat Inc. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.


 171     UseCRC32 = (auxv & HWCAP_CRC32) != 0;
 172   }
 173   if (UseCRC32 && (auxv & HWCAP_CRC32) == 0) {
 174     warning("UseCRC32 specified, but not supported on this CPU");
 175   }
 176   if (auxv & HWCAP_AES) {
 177     UseAES = UseAES || FLAG_IS_DEFAULT(UseAES);
 178     UseAESIntrinsics =
 179         UseAESIntrinsics || (UseAES && FLAG_IS_DEFAULT(UseAESIntrinsics));
 180     if (UseAESIntrinsics && !UseAES) {
 181       warning("UseAESIntrinsics enabled, but UseAES not, enabling");
 182       UseAES = true;
 183     }
 184   } else {
 185     if (UseAES) {
 186       warning("UseAES specified, but not supported on this CPU");
 187     }
 188     if (UseAESIntrinsics) {
 189       warning("UseAESIntrinsics specified, but not supported on this CPU");
 190     }





 191   }
 192 
 193   if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
 194     UseCRC32Intrinsics = true;
 195   }
 196 
 197   if (auxv & (HWCAP_SHA1 | HWCAP_SHA2)) {
 198     if (FLAG_IS_DEFAULT(UseSHA)) {
 199       FLAG_SET_DEFAULT(UseSHA, true);
 200     }
 201   } else if (UseSHA) {
 202     warning("SHA instructions are not available on this CPU");
 203     FLAG_SET_DEFAULT(UseSHA, false);
 204   }
 205 
 206   if (!UseSHA) {
 207     FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
 208     FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
 209     FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
 210   } else {


   1 /*
   2  * Copyright (c) 1997, 2015, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2015, Red Hat Inc. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.


 171     UseCRC32 = (auxv & HWCAP_CRC32) != 0;
 172   }
 173   if (UseCRC32 && (auxv & HWCAP_CRC32) == 0) {
 174     warning("UseCRC32 specified, but not supported on this CPU");
 175   }
 176   if (auxv & HWCAP_AES) {
 177     UseAES = UseAES || FLAG_IS_DEFAULT(UseAES);
 178     UseAESIntrinsics =
 179         UseAESIntrinsics || (UseAES && FLAG_IS_DEFAULT(UseAESIntrinsics));
 180     if (UseAESIntrinsics && !UseAES) {
 181       warning("UseAESIntrinsics enabled, but UseAES not, enabling");
 182       UseAES = true;
 183     }
 184   } else {
 185     if (UseAES) {
 186       warning("UseAES specified, but not supported on this CPU");
 187     }
 188     if (UseAESIntrinsics) {
 189       warning("UseAESIntrinsics specified, but not supported on this CPU");
 190     }
 191   }
 192 
 193   if (UseGHASHIntrinsics) {
 194     warning("GHASH intrinsics are not available on this CPU");
 195     FLAG_SET_DEFAULT(UseGHASHIntrinsics, false);
 196   }
 197 
 198   if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) {
 199     UseCRC32Intrinsics = true;
 200   }
 201 
 202   if (auxv & (HWCAP_SHA1 | HWCAP_SHA2)) {
 203     if (FLAG_IS_DEFAULT(UseSHA)) {
 204       FLAG_SET_DEFAULT(UseSHA, true);
 205     }
 206   } else if (UseSHA) {
 207     warning("SHA instructions are not available on this CPU");
 208     FLAG_SET_DEFAULT(UseSHA, false);
 209   }
 210 
 211   if (!UseSHA) {
 212     FLAG_SET_DEFAULT(UseSHA1Intrinsics, false);
 213     FLAG_SET_DEFAULT(UseSHA256Intrinsics, false);
 214     FLAG_SET_DEFAULT(UseSHA512Intrinsics, false);
 215   } else {


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